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[Qemu-ppc] [PATCH v3 05/24] target-ppc: Add "POWER" prefix to MMCRA PMU
From: |
Alexey Kardashevskiy |
Subject: |
[Qemu-ppc] [PATCH v3 05/24] target-ppc: Add "POWER" prefix to MMCRA PMU registers |
Date: |
Tue, 27 May 2014 20:37:17 +1000 |
Since we started adding "POWER" prefix to 64bit PMU SPRs, let's finish
the transition and fix MMCRA and define a hypv version of it.
Signed-off-by: Alexey Kardashevskiy <address@hidden>
---
target-ppc/cpu.h | 3 ++-
target-ppc/translate_init.c | 2 +-
2 files changed, 3 insertions(+), 2 deletions(-)
diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h
index 0b7ee28..df0b3f1 100644
--- a/target-ppc/cpu.h
+++ b/target-ppc/cpu.h
@@ -1466,7 +1466,7 @@ static inline int cpu_mmu_index (CPUPPCState *env)
#define SPR_PERF2 (0x302)
#define SPR_RCPU_MI_RBA2 (0x302)
#define SPR_MPC_MI_AP (0x302)
-#define SPR_MMCRA (0x302)
+#define SPR_POWER_UMMCRA (0x302)
#define SPR_PERF3 (0x303)
#define SPR_RCPU_MI_RBA3 (0x303)
#define SPR_MPC_MI_EPN (0x303)
@@ -1509,6 +1509,7 @@ static inline int cpu_mmu_index (CPUPPCState *env)
#define SPR_UPERF0 (0x310)
#define SPR_UPERF1 (0x311)
#define SPR_UPERF2 (0x312)
+#define SPR_POWER_MMCRA (0X312)
#define SPR_UPERF3 (0x313)
#define SPR_POWER_PMC1 (0X313)
#define SPR_UPERF4 (0x314)
diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c
index 46401c7..88acf70 100644
--- a/target-ppc/translate_init.c
+++ b/target-ppc/translate_init.c
@@ -7703,7 +7703,7 @@ static void init_proc_POWER7 (CPUPPCState *env)
SPR_NOACCESS, SPR_NOACCESS,
&spr_read_generic, &spr_write_generic,
KVM_REG_PPC_DSCR, 0x00000000);
- spr_register_kvm(env, SPR_MMCRA, "SPR_MMCRA",
+ spr_register_kvm(env, SPR_POWER_MMCRA, "SPR_MMCRA",
SPR_NOACCESS, SPR_NOACCESS,
&spr_read_generic, &spr_write_generic,
KVM_REG_PPC_MMCRA, 0x00000000);
--
1.8.4.rc4
- [Qemu-ppc] [PATCH v3 15/24] target-ppc: Refactor class init for POWER7/8, (continued)
- [Qemu-ppc] [PATCH v3 15/24] target-ppc: Refactor class init for POWER7/8, Alexey Kardashevskiy, 2014/05/27
- [Qemu-ppc] [PATCH v3 19/24] target-ppc: Add POWER8's TM SPRs, Alexey Kardashevskiy, 2014/05/27
- [Qemu-ppc] [PATCH v3 17/24] target-ppc: Add POWER8's MMCR2/MMCRS SPRs, Alexey Kardashevskiy, 2014/05/27
- [Qemu-ppc] [PATCH v3 18/24] target-ppc: Add POWER8's FSCR SPR, Alexey Kardashevskiy, 2014/05/27
- [Qemu-ppc] [PATCH v3 14/24] target-ppc: Move POWER7/8 SPR registration to helpers, Alexey Kardashevskiy, 2014/05/27
- [Qemu-ppc] [PATCH v3 07/24] target-ppc: Add PMC5/6, SDAR and MMCRA to 970 family, Alexey Kardashevskiy, 2014/05/27
- [Qemu-ppc] [PATCH v3 12/24] target-ppc: Enable Hypervisor State bit in MSR for POWER5+, Alexey Kardashevskiy, 2014/05/27
- [Qemu-ppc] [PATCH v3 05/24] target-ppc: Add "POWER" prefix to MMCRA PMU registers,
Alexey Kardashevskiy <=
- [Qemu-ppc] [PATCH v3 20/24] target-ppc: Add more POWER8's branch control SPRs, Alexey Kardashevskiy, 2014/05/27
- [Qemu-ppc] [PATCH v3 16/24] target-ppc: Add POWER7's TIR SPR, Alexey Kardashevskiy, 2014/05/27
- [Qemu-ppc] [PATCH v3 22/24] KVM: target-ppc: Enable transactional state migration, Alexey Kardashevskiy, 2014/05/27
- [Qemu-ppc] [PATCH v3 21/24] target-ppc: Enable PPR and VRSAVE SPRs migration, Alexey Kardashevskiy, 2014/05/27
- [Qemu-ppc] [PATCH v3 23/24] spapr_hcall: Split h_set_mode(), Alexey Kardashevskiy, 2014/05/27
- [Qemu-ppc] [PATCH v3 24/24] spapr_hcall: Add address-translation-mode-on-interrupt resource in H_SET_MODE, Alexey Kardashevskiy, 2014/05/27
- Re: [Qemu-ppc] [PATCH v3 00/24] book3s powerpc classes rework, Alexander Graf, 2014/05/27