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[Qemu-ppc] [PATCH v3 15/24] target-ppc: Refactor class init for POWER7/8
From: |
Alexey Kardashevskiy |
Subject: |
[Qemu-ppc] [PATCH v3 15/24] target-ppc: Refactor class init for POWER7/8 |
Date: |
Tue, 27 May 2014 20:37:27 +1000 |
This extends init_proc_POWER to support POWER7 and POWER8.
Signed-off-by: Alexey Kardashevskiy <address@hidden>
---
target-ppc/translate_init.c | 96 ++++++++++++++++++++++++++++-----------------
1 file changed, 59 insertions(+), 37 deletions(-)
diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c
index ca592ed..e39a44d 100644
--- a/target-ppc/translate_init.c
+++ b/target-ppc/translate_init.c
@@ -7276,6 +7276,9 @@ POWERPC_FAMILY(e600)(ObjectClass *oc, void *data)
enum BOOK3S_CPU_TYPE {
BOOK3S_CPU_970,
BOOK3S_CPU_POWER5PLUS,
+ BOOK3S_CPU_POWER6,
+ BOOK3S_CPU_POWER7,
+ BOOK3S_CPU_POWER8
};
static int check_pow_970 (CPUPPCState *env)
@@ -7582,28 +7585,70 @@ static void init_proc_POWER(CPUPPCState *env, int
version)
gen_spr_book3s_pmu(env);
gen_spr_book3s_dbg(env);
- gen_spr_970_hid(env);
- gen_spr_970_hior(env);
- gen_low_BATs(env);
- gen_spr_970_ctrl(env);
- gen_spr_970_pmu(env);
-
+ switch (version) {
+ case BOOK3S_CPU_970:
+ case BOOK3S_CPU_POWER5PLUS:
+ gen_spr_970_hid(env);
+ gen_spr_970_hior(env);
+ gen_low_BATs(env);
+ gen_spr_970_ctrl(env);
+ gen_spr_970_pmu(env);
+ break;
+ case BOOK3S_CPU_POWER7:
+ case BOOK3S_CPU_POWER8:
+ default:
+ gen_spr_book3s_ids(env);
+ gen_spr_book3s_common(env);
+ gen_spr_amr(env);
+ gen_spr_book3s_purr(env);
+ break;
+ }
if (version >= BOOK3S_CPU_POWER5PLUS) {
gen_spr_book3s_lpar(env);
gen_spr_book3s_external_control(env);
} else {
gen_spr_970_lpar(env);
}
-
- gen_spr_970_dbg(env);
+ if (version == BOOK3S_CPU_970) {
+ gen_spr_970_dbg(env);
+ }
+ if (version >= BOOK3S_CPU_POWER6) {
+ gen_spr_book3s_pcr(env);
+ gen_spr_power6_dbg(env);
+ }
+ if (version >= BOOK3S_CPU_POWER8) {
+ gen_spr_power8_branch_control(env);
+ }
#if !defined(CONFIG_USER_ONLY)
- env->slb_nr = 64;
+ switch (version) {
+ case BOOK3S_CPU_970:
+ case BOOK3S_CPU_POWER5PLUS:
+ env->slb_nr = 64;
+ break;
+ case BOOK3S_CPU_POWER7:
+ case BOOK3S_CPU_POWER8:
+ default:
+ env->slb_nr = 32;
+ break;
+ }
#endif
- init_excp_970(env);
+ /* Allocate hardware IRQ controller */
+ switch (version) {
+ case BOOK3S_CPU_970:
+ case BOOK3S_CPU_POWER5PLUS:
+ init_excp_970(env);
+ ppc970_irq_init(env);
+ break;
+ case BOOK3S_CPU_POWER7:
+ case BOOK3S_CPU_POWER8:
+ default:
+ init_excp_POWER7(env);
+ ppcPOWER7_irq_init(env);
+ break;
+ }
+
env->dcache_line_size = 128;
env->icache_line_size = 128;
- /* Allocate hardware IRQ controller */
- ppc970_irq_init(env);
}
static void init_proc_970(CPUPPCState *env)
@@ -7783,27 +7828,7 @@ static Property powerpc_servercpu_properties[] = {
static void init_proc_POWER7 (CPUPPCState *env)
{
- gen_spr_ne_601(env);
- gen_spr_7xx(env);
- gen_spr_book3s_altivec(env);
- gen_tbl(env);
- gen_spr_book3s_ids(env);
- gen_spr_book3s_purr(env);
- gen_spr_book3s_common(env);
- gen_spr_book3s_pmu(env);
- gen_spr_book3s_lpar(env);
- gen_spr_book3s_pcr(env);
- gen_spr_power6_dbg(env);
- gen_spr_amr(env);
-#if !defined(CONFIG_USER_ONLY)
- env->slb_nr = 32;
-#endif
- init_excp_POWER7(env);
- env->dcache_line_size = 128;
- env->icache_line_size = 128;
-
- /* Allocate hardware IRQ controller */
- ppcPOWER7_irq_init(env);
+ init_proc_POWER(env, BOOK3S_CPU_POWER7);
}
POWERPC_FAMILY(POWER7)(ObjectClass *oc, void *data)
@@ -7930,10 +7955,7 @@ POWERPC_FAMILY(POWER7P)(ObjectClass *oc, void *data)
static void init_proc_POWER8(CPUPPCState *env)
{
- /* inherit P7 */
- init_proc_POWER7(env);
-
- gen_spr_power8_branch_control(env);
+ init_proc_POWER(env, BOOK3S_CPU_POWER8);
}
POWERPC_FAMILY(POWER8)(ObjectClass *oc, void *data)
--
1.8.4.rc4
- Re: [Qemu-ppc] [PATCH v3 10/24] target-ppc: Introduce and reuse generalized init_proc_POWER(), (continued)
[Qemu-ppc] [PATCH v3 02/24] target-ppc: Merge 970FX and 970MP into a single 970 class, Alexey Kardashevskiy, 2014/05/27
[Qemu-ppc] [PATCH v3 04/24] target-ppc: Copy and split gen_spr_7xx() for 970, Alexey Kardashevskiy, 2014/05/27
[Qemu-ppc] [PATCH v3 01/24] target-ppc: Rename 7XX/60x/74XX/e600 PMU SPRs, Alexey Kardashevskiy, 2014/05/27
[Qemu-ppc] [PATCH v3 09/24] target-ppc: Add HID4 SPR for PPC970, Alexey Kardashevskiy, 2014/05/27
[Qemu-ppc] [PATCH v3 11/24] target-ppc: Remove check_pow_970FX, Alexey Kardashevskiy, 2014/05/27
[Qemu-ppc] [PATCH v3 13/24] target-ppc: Enable PMU SPRs migration, Alexey Kardashevskiy, 2014/05/27
[Qemu-ppc] [PATCH v3 15/24] target-ppc: Refactor class init for POWER7/8,
Alexey Kardashevskiy <=
[Qemu-ppc] [PATCH v3 19/24] target-ppc: Add POWER8's TM SPRs, Alexey Kardashevskiy, 2014/05/27
[Qemu-ppc] [PATCH v3 17/24] target-ppc: Add POWER8's MMCR2/MMCRS SPRs, Alexey Kardashevskiy, 2014/05/27
[Qemu-ppc] [PATCH v3 18/24] target-ppc: Add POWER8's FSCR SPR, Alexey Kardashevskiy, 2014/05/27
[Qemu-ppc] [PATCH v3 14/24] target-ppc: Move POWER7/8 SPR registration to helpers, Alexey Kardashevskiy, 2014/05/27
[Qemu-ppc] [PATCH v3 07/24] target-ppc: Add PMC5/6, SDAR and MMCRA to 970 family, Alexey Kardashevskiy, 2014/05/27
[Qemu-ppc] [PATCH v3 12/24] target-ppc: Enable Hypervisor State bit in MSR for POWER5+, Alexey Kardashevskiy, 2014/05/27
[Qemu-ppc] [PATCH v3 05/24] target-ppc: Add "POWER" prefix to MMCRA PMU registers, Alexey Kardashevskiy, 2014/05/27