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[Qemu-ppc] [PATCH v3 09/24] target-ppc: Add HID4 SPR for PPC970
From: |
Alexey Kardashevskiy |
Subject: |
[Qemu-ppc] [PATCH v3 09/24] target-ppc: Add HID4 SPR for PPC970 |
Date: |
Tue, 27 May 2014 20:37:21 +1000 |
Previously LPCR was registered for the 970 class which was wrong as
it does not have LPCR. Instead, HID4 is used which this patch registers.
Signed-off-by: Alexey Kardashevskiy <address@hidden>
---
target-ppc/cpu.h | 1 +
target-ppc/translate_init.c | 11 +++++++++++
2 files changed, 12 insertions(+)
diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h
index f8a01ee..6f2baef 100644
--- a/target-ppc/cpu.h
+++ b/target-ppc/cpu.h
@@ -1683,6 +1683,7 @@ static inline int cpu_mmu_index (CPUPPCState *env)
#define SPR_750_TDCL (0x3F4)
#define SPR_40x_IAC1 (0x3F4)
#define SPR_MMUCSR0 (0x3F4)
+#define SPR_970_HID4 (0x3F4)
#define SPR_DABR (0x3F5)
#define DABR_MASK (~(target_ulong)0x7)
#define SPR_Exxx_BUCSR (0x3F5)
diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c
index 6fc8671..7662730 100644
--- a/target-ppc/translate_init.c
+++ b/target-ppc/translate_init.c
@@ -7474,6 +7474,16 @@ static void gen_spr_book3s_external_control(CPUPPCState
*env)
0x00000000);
}
+static void gen_spr_970_lpar(CPUPPCState *env)
+{
+ /* Logical partitionning */
+ /* PPC970: HID4 is effectively the LPCR */
+ spr_register(env, SPR_970_HID4, "HID4",
+ SPR_NOACCESS, SPR_NOACCESS,
+ &spr_read_generic, &spr_write_generic,
+ 0x00000000);
+}
+
static void init_proc_970 (CPUPPCState *env)
{
gen_spr_ne_601(env);
@@ -7487,6 +7497,7 @@ static void init_proc_970 (CPUPPCState *env)
gen_low_BATs(env);
gen_spr_970_ctrl(env);
gen_spr_970_pmu(env);
+ gen_spr_970_lpar(env);
gen_spr_book3s_external_control(env);
--
1.8.4.rc4
- Re: [Qemu-ppc] [PATCH v3 06/24] target-ppc: Enable writes to user-privileged PMU registers, (continued)
[Qemu-ppc] [PATCH v3 02/24] target-ppc: Merge 970FX and 970MP into a single 970 class, Alexey Kardashevskiy, 2014/05/27
[Qemu-ppc] [PATCH v3 04/24] target-ppc: Copy and split gen_spr_7xx() for 970, Alexey Kardashevskiy, 2014/05/27
[Qemu-ppc] [PATCH v3 01/24] target-ppc: Rename 7XX/60x/74XX/e600 PMU SPRs, Alexey Kardashevskiy, 2014/05/27
[Qemu-ppc] [PATCH v3 09/24] target-ppc: Add HID4 SPR for PPC970,
Alexey Kardashevskiy <=
[Qemu-ppc] [PATCH v3 11/24] target-ppc: Remove check_pow_970FX, Alexey Kardashevskiy, 2014/05/27
[Qemu-ppc] [PATCH v3 13/24] target-ppc: Enable PMU SPRs migration, Alexey Kardashevskiy, 2014/05/27
[Qemu-ppc] [PATCH v3 15/24] target-ppc: Refactor class init for POWER7/8, Alexey Kardashevskiy, 2014/05/27
[Qemu-ppc] [PATCH v3 19/24] target-ppc: Add POWER8's TM SPRs, Alexey Kardashevskiy, 2014/05/27
[Qemu-ppc] [PATCH v3 17/24] target-ppc: Add POWER8's MMCR2/MMCRS SPRs, Alexey Kardashevskiy, 2014/05/27
[Qemu-ppc] [PATCH v3 18/24] target-ppc: Add POWER8's FSCR SPR, Alexey Kardashevskiy, 2014/05/27