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[PULL 17/41] target/arm: Ignore HCR_EL2.ATA when {E2H,TGE} != 11
From: |
Peter Maydell |
Subject: |
[PULL 17/41] target/arm: Ignore HCR_EL2.ATA when {E2H,TGE} != 11 |
Date: |
Tue, 20 Oct 2020 16:56:32 +0100 |
From: Richard Henderson <richard.henderson@linaro.org>
Unlike many other bits in HCR_EL2, the description for this
bit does not contain the phrase "if ... this field behaves
as 0 for all purposes other than", so do not squash the bit
in arm_hcr_el2_eff.
Instead, replicate the E2H+TGE test in the two places that
require it.
Reported-by: Vincenzo Frascino <vincenzo.frascino@arm.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Vincenzo Frascino <vincenzo.frascino@arm.com>
Tested-by: Vincenzo Frascino <vincenzo.frascino@arm.com>
Message-id: 20201008162155.161886-4-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
target/arm/internals.h | 9 +++++----
target/arm/helper.c | 9 +++++----
2 files changed, 10 insertions(+), 8 deletions(-)
diff --git a/target/arm/internals.h b/target/arm/internals.h
index ae99725d2b5..5460678756d 100644
--- a/target/arm/internals.h
+++ b/target/arm/internals.h
@@ -1252,10 +1252,11 @@ static inline bool
allocation_tag_access_enabled(CPUARMState *env, int el,
&& !(env->cp15.scr_el3 & SCR_ATA)) {
return false;
}
- if (el < 2
- && arm_feature(env, ARM_FEATURE_EL2)
- && !(arm_hcr_el2_eff(env) & HCR_ATA)) {
- return false;
+ if (el < 2 && arm_feature(env, ARM_FEATURE_EL2)) {
+ uint64_t hcr = arm_hcr_el2_eff(env);
+ if (!(hcr & HCR_ATA) && (!(hcr & HCR_E2H) || !(hcr & HCR_TGE))) {
+ return false;
+ }
}
sctlr &= (el == 0 ? SCTLR_ATA0 : SCTLR_ATA);
return sctlr != 0;
diff --git a/target/arm/helper.c b/target/arm/helper.c
index f49b045d366..97bb6b8c01b 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -6906,10 +6906,11 @@ static CPAccessResult access_mte(CPUARMState *env,
const ARMCPRegInfo *ri,
{
int el = arm_current_el(env);
- if (el < 2 &&
- arm_feature(env, ARM_FEATURE_EL2) &&
- !(arm_hcr_el2_eff(env) & HCR_ATA)) {
- return CP_ACCESS_TRAP_EL2;
+ if (el < 2 && arm_feature(env, ARM_FEATURE_EL2)) {
+ uint64_t hcr = arm_hcr_el2_eff(env);
+ if (!(hcr & HCR_ATA) && (!(hcr & HCR_E2H) || !(hcr & HCR_TGE))) {
+ return CP_ACCESS_TRAP_EL2;
+ }
}
if (el < 3 &&
arm_feature(env, ARM_FEATURE_EL3) &&
--
2.20.1
- [PULL 08/41] hw/arm/bcm2835_peripherals: Correctly wire the SYS_timer IRQs, (continued)
- [PULL 08/41] hw/arm/bcm2835_peripherals: Correctly wire the SYS_timer IRQs, Peter Maydell, 2020/10/20
- [PULL 07/41] hw/timer/bcm2835: Support the timer COMPARE registers, Peter Maydell, 2020/10/20
- [PULL 09/41] accel/tcg: Add tlb_flush_page_bits_by_mmuidx*, Peter Maydell, 2020/10/20
- [PULL 10/41] target/arm: Use tlb_flush_page_bits_by_mmuidx*, Peter Maydell, 2020/10/20
- [PULL 12/41] loads-stores.rst: add footnote that clarifies GETPC usage, Peter Maydell, 2020/10/20
- [PULL 13/41] hw/intc/bcm2835_ic: Trace GPU/CPU IRQ handlers, Peter Maydell, 2020/10/20
- [PULL 11/41] tests/qtest: Add npcm7xx timer test, Peter Maydell, 2020/10/20
- [PULL 14/41] hw/intc/bcm2836_control: Use IRQ definitions instead of magic numbers, Peter Maydell, 2020/10/20
- [PULL 15/41] target/arm: Remove redundant mmu_idx lookup, Peter Maydell, 2020/10/20
- [PULL 16/41] target/arm: Fix reported EL for mte_check_fail, Peter Maydell, 2020/10/20
- [PULL 17/41] target/arm: Ignore HCR_EL2.ATA when {E2H,TGE} != 11,
Peter Maydell <=
- [PULL 18/41] microbit_i2c: Fix coredump when dump-vmstate, Peter Maydell, 2020/10/20
- [PULL 19/41] hw/arm/nseries: Fix loading kernel image on n8x0 machines, Peter Maydell, 2020/10/20
- [PULL 20/41] decodetree: Fix codegen for non-overlapping group inside overlapping group, Peter Maydell, 2020/10/20
- [PULL 21/41] target/arm: Implement v8.1M NOCP handling, Peter Maydell, 2020/10/20
- [PULL 22/41] target/arm: Implement v8.1M conditional-select insns, Peter Maydell, 2020/10/20
- [PULL 23/41] target/arm: Make the t32 insn[25:23]=111 group non-overlapping, Peter Maydell, 2020/10/20
- [PULL 24/41] target/arm: Don't allow BLX imm for M-profile, Peter Maydell, 2020/10/20
- [PULL 25/41] target/arm: Implement v8.1M branch-future insns (as NOPs), Peter Maydell, 2020/10/20
- [PULL 26/41] target/arm: Implement v8.1M low-overhead-loop instructions, Peter Maydell, 2020/10/20
- [PULL 27/41] target/arm: Fix has_vfp/has_neon ID reg squashing for M-profile, Peter Maydell, 2020/10/20