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[PULL 24/41] target/arm: Don't allow BLX imm for M-profile
From: |
Peter Maydell |
Subject: |
[PULL 24/41] target/arm: Don't allow BLX imm for M-profile |
Date: |
Tue, 20 Oct 2020 16:56:39 +0100 |
The BLX immediate insn in the Thumb encoding always performs
a switch from Thumb to Arm state. This would be totally useless
in M-profile which has no Arm decoder, and so the instruction
does not exist at all there. Make the encoding UNDEF for M-profile.
(This part of the encoding space is used for the branch-future
and low-overhead-loop insns in v8.1M.)
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20201019151301.2046-6-peter.maydell@linaro.org
---
target/arm/translate.c | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/target/arm/translate.c b/target/arm/translate.c
index 9f2201ca577..dc3a4031db7 100644
--- a/target/arm/translate.c
+++ b/target/arm/translate.c
@@ -7918,6 +7918,14 @@ static bool trans_BLX_i(DisasContext *s, arg_BLX_i *a)
{
TCGv_i32 tmp;
+ /*
+ * BLX <imm> would be useless on M-profile; the encoding space
+ * is used for other insns from v8.1M onward, and UNDEFs before that.
+ */
+ if (arm_dc_feature(s, ARM_FEATURE_M)) {
+ return false;
+ }
+
/* For A32, ARM_FEATURE_V5 is checked near the start of the uncond block.
*/
if (s->thumb && (a->imm & 2)) {
return false;
--
2.20.1
- [PULL 14/41] hw/intc/bcm2836_control: Use IRQ definitions instead of magic numbers, (continued)
- [PULL 14/41] hw/intc/bcm2836_control: Use IRQ definitions instead of magic numbers, Peter Maydell, 2020/10/20
- [PULL 15/41] target/arm: Remove redundant mmu_idx lookup, Peter Maydell, 2020/10/20
- [PULL 16/41] target/arm: Fix reported EL for mte_check_fail, Peter Maydell, 2020/10/20
- [PULL 17/41] target/arm: Ignore HCR_EL2.ATA when {E2H,TGE} != 11, Peter Maydell, 2020/10/20
- [PULL 18/41] microbit_i2c: Fix coredump when dump-vmstate, Peter Maydell, 2020/10/20
- [PULL 19/41] hw/arm/nseries: Fix loading kernel image on n8x0 machines, Peter Maydell, 2020/10/20
- [PULL 20/41] decodetree: Fix codegen for non-overlapping group inside overlapping group, Peter Maydell, 2020/10/20
- [PULL 21/41] target/arm: Implement v8.1M NOCP handling, Peter Maydell, 2020/10/20
- [PULL 22/41] target/arm: Implement v8.1M conditional-select insns, Peter Maydell, 2020/10/20
- [PULL 23/41] target/arm: Make the t32 insn[25:23]=111 group non-overlapping, Peter Maydell, 2020/10/20
- [PULL 24/41] target/arm: Don't allow BLX imm for M-profile,
Peter Maydell <=
- [PULL 25/41] target/arm: Implement v8.1M branch-future insns (as NOPs), Peter Maydell, 2020/10/20
- [PULL 26/41] target/arm: Implement v8.1M low-overhead-loop instructions, Peter Maydell, 2020/10/20
- [PULL 27/41] target/arm: Fix has_vfp/has_neon ID reg squashing for M-profile, Peter Maydell, 2020/10/20
- [PULL 28/41] target/arm: Allow M-profile CPUs with FP16 to set FPSCR.FP16, Peter Maydell, 2020/10/20
- [PULL 31/41] linux-user: Set PAGE_TARGET_1 for TARGET_PROT_BTI, Peter Maydell, 2020/10/20
- [PULL 29/41] target/arm: Implement FPSCR.LTPSIZE for M-profile LOB extension, Peter Maydell, 2020/10/20
- [PULL 30/41] linux-user/aarch64: Reset btype for signals, Peter Maydell, 2020/10/20
- [PULL 32/41] include/elf: Add defines related to GNU property notes for AArch64, Peter Maydell, 2020/10/20
- [PULL 33/41] linux-user/elfload: Avoid leaking interp_name using GLib memory API, Peter Maydell, 2020/10/20
- [PULL 35/41] linux-user/elfload: Adjust iteration over phdr, Peter Maydell, 2020/10/20