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[Qemu-devel] [PATCH v2 05/30] target/mips: Clean up handling of CP0 regi
From: |
Aleksandar Markovic |
Subject: |
[Qemu-devel] [PATCH v2 05/30] target/mips: Clean up handling of CP0 register 4 |
Date: |
Wed, 28 Aug 2019 18:26:29 +0200 |
From: Aleksandar Markovic <address@hidden>
Clean up handling of CP0 register 4.
Signed-off-by: Aleksandar Markovic <address@hidden>
---
target/mips/cpu.h | 2 ++
target/mips/translate.c | 44 ++++++++++++++++++++++++--------------------
2 files changed, 26 insertions(+), 20 deletions(-)
diff --git a/target/mips/cpu.h b/target/mips/cpu.h
index c2ef942..04d4b09 100644
--- a/target/mips/cpu.h
+++ b/target/mips/cpu.h
@@ -307,7 +307,9 @@ typedef struct mips_def_t mips_def_t;
#define CP0_REG03__TCOPT 7
/* CP0 Register 04 */
#define CP0_REG04__CONTEXT 0
+#define CP0_REG04__CONTEXTCONFIG 1
#define CP0_REG04__USERLOCAL 2
+#define CP0_REG04__XCONTEXTCONFIG 3
#define CP0_REG04__DBGCONTEXTID 4
#define CP0_REG04__MEMORYMAPID 5
/* CP0 Register 05 */
diff --git a/target/mips/translate.c b/target/mips/translate.c
index 013dd53..677a2d0 100644
--- a/target/mips/translate.c
+++ b/target/mips/translate.c
@@ -7015,23 +7015,24 @@ static void gen_mfc0(DisasContext *ctx, TCGv arg, int
reg, int sel)
break;
case CP0_REGISTER_04:
switch (sel) {
- case 0:
+ case CP0_REG04__CONTEXT:
tcg_gen_ld_tl(arg, cpu_env, offsetof(CPUMIPSState, CP0_Context));
tcg_gen_ext32s_tl(arg, arg);
register_name = "Context";
break;
- case 1:
- /* gen_helper_mfc0_contextconfig(arg); - SmartMIPS ASE */
+ case CP0_REG04__CONTEXTCONFIG:
+ /* SmartMIPS ASE */
+ /* gen_helper_mfc0_contextconfig(arg); */
register_name = "ContextConfig";
goto cp0_unimplemented;
- case 2:
+ case CP0_REG04__USERLOCAL:
CP0_CHECK(ctx->ulri);
tcg_gen_ld_tl(arg, cpu_env,
offsetof(CPUMIPSState, active_tc.CP0_UserLocal));
tcg_gen_ext32s_tl(arg, arg);
register_name = "UserLocal";
break;
- case 5:
+ case CP0_REG04__MEMORYMAPID:
CP0_CHECK(ctx->mi);
gen_helper_mtc0_memorymapid(cpu_env, arg);
register_name = "MemoryMapID";
@@ -7758,21 +7759,22 @@ static void gen_mtc0(DisasContext *ctx, TCGv arg, int
reg, int sel)
break;
case CP0_REGISTER_04:
switch (sel) {
- case 0:
+ case CP0_REG04__CONTEXT:
gen_helper_mtc0_context(cpu_env, arg);
register_name = "Context";
break;
- case 1:
-// gen_helper_mtc0_contextconfig(cpu_env, arg); /* SmartMIPS ASE */
+ case CP0_REG04__CONTEXTCONFIG:
+ /* SmartMIPS ASE */
+ /* gen_helper_mtc0_contextconfig(cpu_env, arg); */
register_name = "ContextConfig";
goto cp0_unimplemented;
- case 2:
+ case CP0_REG04__USERLOCAL:
CP0_CHECK(ctx->ulri);
tcg_gen_st_tl(arg, cpu_env,
offsetof(CPUMIPSState, active_tc.CP0_UserLocal));
register_name = "UserLocal";
break;
- case 5:
+ case CP0_REG04__MEMORYMAPID:
CP0_CHECK(ctx->mi);
gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_MemoryMapID));
register_name = "MemoryMapID";
@@ -8509,21 +8511,22 @@ static void gen_dmfc0(DisasContext *ctx, TCGv arg, int
reg, int sel)
break;
case CP0_REGISTER_04:
switch (sel) {
- case 0:
+ case CP0_REG04__CONTEXT:
tcg_gen_ld_tl(arg, cpu_env, offsetof(CPUMIPSState, CP0_Context));
register_name = "Context";
break;
- case 1:
-// gen_helper_dmfc0_contextconfig(arg); /* SmartMIPS ASE */
+ case CP0_REG04__CONTEXTCONFIG:
+ /* SmartMIPS ASE */
+ /* gen_helper_dmfc0_contextconfig(arg); */
register_name = "ContextConfig";
goto cp0_unimplemented;
- case 2:
+ case CP0_REG04__USERLOCAL:
CP0_CHECK(ctx->ulri);
tcg_gen_ld_tl(arg, cpu_env,
offsetof(CPUMIPSState, active_tc.CP0_UserLocal));
register_name = "UserLocal";
break;
- case 5:
+ case CP0_REG04__MEMORYMAPID:
CP0_CHECK(ctx->mi);
gen_helper_mtc0_memorymapid(cpu_env, arg);
register_name = "MemoryMapID";
@@ -9230,21 +9233,22 @@ static void gen_dmtc0(DisasContext *ctx, TCGv arg, int
reg, int sel)
break;
case CP0_REGISTER_04:
switch (sel) {
- case 0:
+ case CP0_REG04__CONTEXT:
gen_helper_mtc0_context(cpu_env, arg);
register_name = "Context";
break;
- case 1:
-// gen_helper_mtc0_contextconfig(cpu_env, arg); /* SmartMIPS ASE */
+ case CP0_REG04__CONTEXTCONFIG:
+ /* SmartMIPS ASE */
+ /* gen_helper_mtc0_contextconfig(cpu_env, arg); */
register_name = "ContextConfig";
goto cp0_unimplemented;
- case 2:
+ case CP0_REG04__USERLOCAL:
CP0_CHECK(ctx->ulri);
tcg_gen_st_tl(arg, cpu_env,
offsetof(CPUMIPSState, active_tc.CP0_UserLocal));
register_name = "UserLocal";
break;
- case 5:
+ case CP0_REG04__MEMORYMAPID:
CP0_CHECK(ctx->mi);
gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_MemoryMapID));
register_name = "MemoryMapID";
--
2.7.4
- [Qemu-devel] [PATCH v2 00/30] Clean up handling of configuration register CP0, Aleksandar Markovic, 2019/08/28
- [Qemu-devel] [PATCH v2 04/30] target/mips: Clean up handling of CP0 register 3, Aleksandar Markovic, 2019/08/28
- [Qemu-devel] [PATCH v2 01/30] target/mips: Clean up handling of CP0 register 0, Aleksandar Markovic, 2019/08/28
- [Qemu-devel] [PATCH v2 02/30] target/mips: Clean up handling of CP0 register 1, Aleksandar Markovic, 2019/08/28
- [Qemu-devel] [PATCH v2 09/30] target/mips: Clean up handling of CP0 register 8, Aleksandar Markovic, 2019/08/28
- [Qemu-devel] [PATCH v2 07/30] target/mips: Clean up handling of CP0 register 6, Aleksandar Markovic, 2019/08/28
- [Qemu-devel] [PATCH v2 05/30] target/mips: Clean up handling of CP0 register 4,
Aleksandar Markovic <=
- [Qemu-devel] [PATCH v2 10/30] target/mips: Clean up handling of CP0 register 9, Aleksandar Markovic, 2019/08/28
- [Qemu-devel] [PATCH v2 03/30] target/mips: Clean up handling of CP0 register 2, Aleksandar Markovic, 2019/08/28
- [Qemu-devel] [PATCH v2 06/30] target/mips: Clean up handling of CP0 register 5, Aleksandar Markovic, 2019/08/28
- [Qemu-devel] [PATCH v2 12/30] target/mips: Clean up handling of CP0 register 11, Aleksandar Markovic, 2019/08/28
- [Qemu-devel] [PATCH v2 14/30] target/mips: Clean up handling of CP0 register 13, Aleksandar Markovic, 2019/08/28
- [Qemu-devel] [PATCH v2 13/30] target/mips: Clean up handling of CP0 register 12, Aleksandar Markovic, 2019/08/28
- [Qemu-devel] [PATCH v2 26/30] target/mips: Clean up handling of CP0 register 27, Aleksandar Markovic, 2019/08/28
- [Qemu-devel] [PATCH v2 18/30] target/mips: Clean up handling of CP0 register 17, Aleksandar Markovic, 2019/08/28
- [Qemu-devel] [PATCH v2 16/30] target/mips: Clean up handling of CP0 register 15, Aleksandar Markovic, 2019/08/28
- [Qemu-devel] [PATCH v2 20/30] target/mips: Clean up handling of CP0 register 19, Aleksandar Markovic, 2019/08/28