[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[Qemu-devel] [PATCH v2 04/30] target/mips: Clean up handling of CP0 regi
From: |
Aleksandar Markovic |
Subject: |
[Qemu-devel] [PATCH v2 04/30] target/mips: Clean up handling of CP0 register 3 |
Date: |
Wed, 28 Aug 2019 18:26:28 +0200 |
From: Aleksandar Markovic <address@hidden>
Clean up handling of CP0 register 3.
Signed-off-by: Aleksandar Markovic <address@hidden>
---
target/mips/cpu.h | 1 +
target/mips/translate.c | 20 ++++++++++----------
2 files changed, 11 insertions(+), 10 deletions(-)
diff --git a/target/mips/cpu.h b/target/mips/cpu.h
index eebdc9f..c2ef942 100644
--- a/target/mips/cpu.h
+++ b/target/mips/cpu.h
@@ -304,6 +304,7 @@ typedef struct mips_def_t mips_def_t;
/* CP0 Register 03 */
#define CP0_REG03__ENTRYLO1 0
#define CP0_REG03__GLOBALNUM 1
+#define CP0_REG03__TCOPT 7
/* CP0 Register 04 */
#define CP0_REG04__CONTEXT 0
#define CP0_REG04__USERLOCAL 2
diff --git a/target/mips/translate.c b/target/mips/translate.c
index 6e65312..013dd53 100644
--- a/target/mips/translate.c
+++ b/target/mips/translate.c
@@ -6649,7 +6649,7 @@ static void gen_mfhc0(DisasContext *ctx, TCGv arg, int
reg, int sel)
break;
case CP0_REGISTER_03:
switch (sel) {
- case 0:
+ case CP0_REG03__ENTRYLO1:
CP0_CHECK(ctx->hflags & MIPS_HFLAG_ELPA);
gen_mfhc0_entrylo(arg, offsetof(CPUMIPSState, CP0_EntryLo1));
register_name = "EntryLo1";
@@ -6749,7 +6749,7 @@ static void gen_mthc0(DisasContext *ctx, TCGv arg, int
reg, int sel)
break;
case CP0_REGISTER_03:
switch (sel) {
- case 0:
+ case CP0_REG03__ENTRYLO1:
CP0_CHECK(ctx->hflags & MIPS_HFLAG_ELPA);
tcg_gen_andi_tl(arg, arg, mask);
gen_mthc0_entrylo(arg, offsetof(CPUMIPSState, CP0_EntryLo1));
@@ -6987,7 +6987,7 @@ static void gen_mfc0(DisasContext *ctx, TCGv arg, int
reg, int sel)
break;
case CP0_REGISTER_03:
switch (sel) {
- case 0:
+ case CP0_REG03__ENTRYLO1:
{
TCGv_i64 tmp = tcg_temp_new_i64();
tcg_gen_ld_i64(tmp, cpu_env,
@@ -7004,7 +7004,7 @@ static void gen_mfc0(DisasContext *ctx, TCGv arg, int
reg, int sel)
}
register_name = "EntryLo1";
break;
- case 1:
+ case CP0_REG03__GLOBALNUM:
CP0_CHECK(ctx->vp);
gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_GlobalNumber));
register_name = "GlobalNumber";
@@ -7743,11 +7743,11 @@ static void gen_mtc0(DisasContext *ctx, TCGv arg, int
reg, int sel)
break;
case CP0_REGISTER_03:
switch (sel) {
- case 0:
+ case CP0_REG03__ENTRYLO1:
gen_helper_mtc0_entrylo1(cpu_env, arg);
register_name = "EntryLo1";
break;
- case 1:
+ case CP0_REG03__GLOBALNUM:
CP0_CHECK(ctx->vp);
/* ignored */
register_name = "GlobalNumber";
@@ -8494,11 +8494,11 @@ static void gen_dmfc0(DisasContext *ctx, TCGv arg, int
reg, int sel)
break;
case CP0_REGISTER_03:
switch (sel) {
- case 0:
+ case CP0_REG03__ENTRYLO1:
tcg_gen_ld_tl(arg, cpu_env, offsetof(CPUMIPSState, CP0_EntryLo1));
register_name = "EntryLo1";
break;
- case 1:
+ case CP0_REG03__GLOBALNUM:
CP0_CHECK(ctx->vp);
gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_GlobalNumber));
register_name = "GlobalNumber";
@@ -9215,11 +9215,11 @@ static void gen_dmtc0(DisasContext *ctx, TCGv arg, int
reg, int sel)
break;
case CP0_REGISTER_03:
switch (sel) {
- case 0:
+ case CP0_REG03__ENTRYLO1:
gen_helper_dmtc0_entrylo1(cpu_env, arg);
register_name = "EntryLo1";
break;
- case 1:
+ case CP0_REG03__GLOBALNUM:
CP0_CHECK(ctx->vp);
/* ignored */
register_name = "GlobalNumber";
--
2.7.4
- [Qemu-devel] [PATCH v2 00/30] Clean up handling of configuration register CP0, Aleksandar Markovic, 2019/08/28
- [Qemu-devel] [PATCH v2 04/30] target/mips: Clean up handling of CP0 register 3,
Aleksandar Markovic <=
- [Qemu-devel] [PATCH v2 01/30] target/mips: Clean up handling of CP0 register 0, Aleksandar Markovic, 2019/08/28
- [Qemu-devel] [PATCH v2 02/30] target/mips: Clean up handling of CP0 register 1, Aleksandar Markovic, 2019/08/28
- [Qemu-devel] [PATCH v2 09/30] target/mips: Clean up handling of CP0 register 8, Aleksandar Markovic, 2019/08/28
- [Qemu-devel] [PATCH v2 07/30] target/mips: Clean up handling of CP0 register 6, Aleksandar Markovic, 2019/08/28
- [Qemu-devel] [PATCH v2 05/30] target/mips: Clean up handling of CP0 register 4, Aleksandar Markovic, 2019/08/28
- [Qemu-devel] [PATCH v2 10/30] target/mips: Clean up handling of CP0 register 9, Aleksandar Markovic, 2019/08/28
- [Qemu-devel] [PATCH v2 03/30] target/mips: Clean up handling of CP0 register 2, Aleksandar Markovic, 2019/08/28
- [Qemu-devel] [PATCH v2 06/30] target/mips: Clean up handling of CP0 register 5, Aleksandar Markovic, 2019/08/28
- [Qemu-devel] [PATCH v2 12/30] target/mips: Clean up handling of CP0 register 11, Aleksandar Markovic, 2019/08/28
- [Qemu-devel] [PATCH v2 14/30] target/mips: Clean up handling of CP0 register 13, Aleksandar Markovic, 2019/08/28