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[Qemu-devel] [PATCH v2 20/30] target/mips: Clean up handling of CP0 regi
From: |
Aleksandar Markovic |
Subject: |
[Qemu-devel] [PATCH v2 20/30] target/mips: Clean up handling of CP0 register 19 |
Date: |
Wed, 28 Aug 2019 18:26:44 +0200 |
From: Aleksandar Markovic <address@hidden>
Clean up handling of CP0 register 19.
Signed-off-by: Aleksandar Markovic <address@hidden>
---
target/mips/cpu.h | 4 ++++
target/mips/translate.c | 64 ++++++++++++++++++++++++-------------------------
2 files changed, 36 insertions(+), 32 deletions(-)
diff --git a/target/mips/cpu.h b/target/mips/cpu.h
index 6881e96..f809759 100644
--- a/target/mips/cpu.h
+++ b/target/mips/cpu.h
@@ -397,6 +397,10 @@ typedef struct mips_def_t mips_def_t;
#define CP0_REG19__WATCHHI1 1
#define CP0_REG19__WATCHHI2 2
#define CP0_REG19__WATCHHI3 3
+#define CP0_REG19__WATCHHI4 4
+#define CP0_REG19__WATCHHI5 5
+#define CP0_REG19__WATCHHI6 6
+#define CP0_REG19__WATCHHI7 7
/* CP0 Register 20 */
#define CP0_REG20__XCONTEXT 0
/* CP0 Register 21 */
diff --git a/target/mips/translate.c b/target/mips/translate.c
index adc1049..20c90a7 100644
--- a/target/mips/translate.c
+++ b/target/mips/translate.c
@@ -7371,14 +7371,14 @@ static void gen_mfc0(DisasContext *ctx, TCGv arg, int
reg, int sel)
break;
case CP0_REGISTER_19:
switch (sel) {
- case 0:
- case 1:
- case 2:
- case 3:
- case 4:
- case 5:
- case 6:
- case 7:
+ case CP0_REG19__WATCHHI0:
+ case CP0_REG19__WATCHHI1:
+ case CP0_REG19__WATCHHI2:
+ case CP0_REG19__WATCHHI3:
+ case CP0_REG19__WATCHHI4:
+ case CP0_REG19__WATCHHI5:
+ case CP0_REG19__WATCHHI6:
+ case CP0_REG19__WATCHHI7:
CP0_CHECK(ctx->CP0_Config1 & (1 << CP0C1_WR));
gen_helper_1e0i(mfc0_watchhi, arg, sel);
register_name = "WatchHi";
@@ -8111,14 +8111,14 @@ static void gen_mtc0(DisasContext *ctx, TCGv arg, int
reg, int sel)
break;
case CP0_REGISTER_19:
switch (sel) {
- case 0:
- case 1:
- case 2:
- case 3:
- case 4:
- case 5:
- case 6:
- case 7:
+ case CP0_REG19__WATCHHI0:
+ case CP0_REG19__WATCHHI1:
+ case CP0_REG19__WATCHHI2:
+ case CP0_REG19__WATCHHI3:
+ case CP0_REG19__WATCHHI4:
+ case CP0_REG19__WATCHHI5:
+ case CP0_REG19__WATCHHI6:
+ case CP0_REG19__WATCHHI7:
CP0_CHECK(ctx->CP0_Config1 & (1 << CP0C1_WR));
gen_helper_0e1i(mtc0_watchhi, arg, sel);
register_name = "WatchHi";
@@ -8857,14 +8857,14 @@ static void gen_dmfc0(DisasContext *ctx, TCGv arg, int
reg, int sel)
break;
case CP0_REGISTER_19:
switch (sel) {
- case 0:
- case 1:
- case 2:
- case 3:
- case 4:
- case 5:
- case 6:
- case 7:
+ case CP0_REG19__WATCHHI0:
+ case CP0_REG19__WATCHHI1:
+ case CP0_REG19__WATCHHI2:
+ case CP0_REG19__WATCHHI3:
+ case CP0_REG19__WATCHHI4:
+ case CP0_REG19__WATCHHI5:
+ case CP0_REG19__WATCHHI6:
+ case CP0_REG19__WATCHHI7:
CP0_CHECK(ctx->CP0_Config1 & (1 << CP0C1_WR));
gen_helper_1e0i(dmfc0_watchhi, arg, sel);
register_name = "WatchHi";
@@ -9579,14 +9579,14 @@ static void gen_dmtc0(DisasContext *ctx, TCGv arg, int
reg, int sel)
break;
case CP0_REGISTER_19:
switch (sel) {
- case 0:
- case 1:
- case 2:
- case 3:
- case 4:
- case 5:
- case 6:
- case 7:
+ case CP0_REG19__WATCHHI0:
+ case CP0_REG19__WATCHHI1:
+ case CP0_REG19__WATCHHI2:
+ case CP0_REG19__WATCHHI3:
+ case CP0_REG19__WATCHHI4:
+ case CP0_REG19__WATCHHI5:
+ case CP0_REG19__WATCHHI6:
+ case CP0_REG19__WATCHHI7:
CP0_CHECK(ctx->CP0_Config1 & (1 << CP0C1_WR));
gen_helper_0e1i(mtc0_watchhi, arg, sel);
register_name = "WatchHi";
--
2.7.4
- [Qemu-devel] [PATCH v2 05/30] target/mips: Clean up handling of CP0 register 4, (continued)
- [Qemu-devel] [PATCH v2 05/30] target/mips: Clean up handling of CP0 register 4, Aleksandar Markovic, 2019/08/28
- [Qemu-devel] [PATCH v2 10/30] target/mips: Clean up handling of CP0 register 9, Aleksandar Markovic, 2019/08/28
- [Qemu-devel] [PATCH v2 03/30] target/mips: Clean up handling of CP0 register 2, Aleksandar Markovic, 2019/08/28
- [Qemu-devel] [PATCH v2 06/30] target/mips: Clean up handling of CP0 register 5, Aleksandar Markovic, 2019/08/28
- [Qemu-devel] [PATCH v2 12/30] target/mips: Clean up handling of CP0 register 11, Aleksandar Markovic, 2019/08/28
- [Qemu-devel] [PATCH v2 14/30] target/mips: Clean up handling of CP0 register 13, Aleksandar Markovic, 2019/08/28
- [Qemu-devel] [PATCH v2 13/30] target/mips: Clean up handling of CP0 register 12, Aleksandar Markovic, 2019/08/28
- [Qemu-devel] [PATCH v2 26/30] target/mips: Clean up handling of CP0 register 27, Aleksandar Markovic, 2019/08/28
- [Qemu-devel] [PATCH v2 18/30] target/mips: Clean up handling of CP0 register 17, Aleksandar Markovic, 2019/08/28
- [Qemu-devel] [PATCH v2 16/30] target/mips: Clean up handling of CP0 register 15, Aleksandar Markovic, 2019/08/28
- [Qemu-devel] [PATCH v2 20/30] target/mips: Clean up handling of CP0 register 19,
Aleksandar Markovic <=
- [Qemu-devel] [PATCH v2 15/30] target/mips: Clean up handling of CP0 register 14, Aleksandar Markovic, 2019/08/28
- [Qemu-devel] [PATCH v2 08/30] target/mips: Clean up handling of CP0 register 7, Aleksandar Markovic, 2019/08/28
- [Qemu-devel] [PATCH v2 17/30] target/mips: Clean up handling of CP0 register 16, Aleksandar Markovic, 2019/08/28
- [Qemu-devel] [PATCH v2 11/30] target/mips: Clean up handling of CP0 register 10, Aleksandar Markovic, 2019/08/28
- [Qemu-devel] [PATCH v2 23/30] target/mips: Clean up handling of CP0 register 24, Aleksandar Markovic, 2019/08/28
- [Qemu-devel] [PATCH v2 19/30] target/mips: Clean up handling of CP0 register 18, Aleksandar Markovic, 2019/08/28
- [Qemu-devel] [PATCH v2 21/30] target/mips: Clean up handling of CP0 register 20, Aleksandar Markovic, 2019/08/28
- [Qemu-devel] [PATCH v2 22/30] target/mips: Clean up handling of CP0 register 23, Aleksandar Markovic, 2019/08/28
- [Qemu-devel] [PATCH v2 27/30] target/mips: Clean up handling of CP0 register 28, Aleksandar Markovic, 2019/08/28
- [Qemu-devel] [PATCH v2 24/30] target/mips: Clean up handling of CP0 register 25, Aleksandar Markovic, 2019/08/28