[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[PULL 57/68] tcg/s390x: Fold the ext{8, 16, 32}[us] cases into {s}extrac
From: |
Richard Henderson |
Subject: |
[PULL 57/68] tcg/s390x: Fold the ext{8, 16, 32}[us] cases into {s}extract |
Date: |
Fri, 17 Jan 2025 10:24:45 -0800 |
Accept byte and word extensions with the extract opcodes.
This is preparatory to removing the specialized extracts.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
tcg/s390x/tcg-target-has.h | 22 ++++++++++++++++++++--
tcg/s390x/tcg-target.c.inc | 37 +++++++++++++++++++++++++++++++++++++
2 files changed, 57 insertions(+), 2 deletions(-)
diff --git a/tcg/s390x/tcg-target-has.h b/tcg/s390x/tcg-target-has.h
index 4992d74f12..72b57407d4 100644
--- a/tcg/s390x/tcg-target-has.h
+++ b/tcg/s390x/tcg-target-has.h
@@ -48,7 +48,7 @@ extern uint64_t s390_facilities[3];
#define TCG_TARGET_HAS_ctpop_i32 1
#define TCG_TARGET_HAS_deposit_i32 1
#define TCG_TARGET_HAS_extract_i32 1
-#define TCG_TARGET_HAS_sextract_i32 0
+#define TCG_TARGET_HAS_sextract_i32 1
#define TCG_TARGET_HAS_extract2_i32 0
#define TCG_TARGET_HAS_negsetcond_i32 1
#define TCG_TARGET_HAS_add2_i32 1
@@ -82,7 +82,7 @@ extern uint64_t s390_facilities[3];
#define TCG_TARGET_HAS_ctpop_i64 1
#define TCG_TARGET_HAS_deposit_i64 1
#define TCG_TARGET_HAS_extract_i64 1
-#define TCG_TARGET_HAS_sextract_i64 0
+#define TCG_TARGET_HAS_sextract_i64 1
#define TCG_TARGET_HAS_extract2_i64 0
#define TCG_TARGET_HAS_negsetcond_i64 1
#define TCG_TARGET_HAS_add2_i64 1
@@ -121,4 +121,22 @@ extern uint64_t s390_facilities[3];
#define TCG_TARGET_HAS_cmpsel_vec 1
#define TCG_TARGET_HAS_tst_vec 0
+#define TCG_TARGET_extract_valid(type, ofs, len) 1
+
+static inline bool
+tcg_target_sextract_valid(TCGType type, unsigned ofs, unsigned len)
+{
+ if (ofs == 0) {
+ switch (len) {
+ case 8:
+ case 16:
+ return true;
+ case 32:
+ return type == TCG_TYPE_I64;
+ }
+ }
+ return false;
+}
+#define TCG_TARGET_sextract_valid tcg_target_sextract_valid
+
#endif
diff --git a/tcg/s390x/tcg-target.c.inc b/tcg/s390x/tcg-target.c.inc
index fc7d986e68..dc7722dc31 100644
--- a/tcg/s390x/tcg-target.c.inc
+++ b/tcg/s390x/tcg-target.c.inc
@@ -1572,9 +1572,41 @@ static void tgen_deposit(TCGContext *s, TCGReg dest,
TCGReg src,
static void tgen_extract(TCGContext *s, TCGReg dest, TCGReg src,
int ofs, int len)
{
+ if (ofs == 0) {
+ switch (len) {
+ case 8:
+ tcg_out_ext8u(s, dest, src);
+ return;
+ case 16:
+ tcg_out_ext16u(s, dest, src);
+ return;
+ case 32:
+ tcg_out_ext32u(s, dest, src);
+ return;
+ }
+ }
tcg_out_risbg(s, dest, src, 64 - len, 63, 64 - ofs, 1);
}
+static void tgen_sextract(TCGContext *s, TCGReg dest, TCGReg src,
+ int ofs, int len)
+{
+ if (ofs == 0) {
+ switch (len) {
+ case 8:
+ tcg_out_ext8s(s, TCG_TYPE_REG, dest, src);
+ return;
+ case 16:
+ tcg_out_ext16s(s, TCG_TYPE_REG, dest, src);
+ return;
+ case 32:
+ tcg_out_ext32s(s, dest, src);
+ return;
+ }
+ }
+ g_assert_not_reached();
+}
+
static void tgen_gotoi(TCGContext *s, int cc, const tcg_insn_unit *dest)
{
ptrdiff_t off = tcg_pcrel_diff(s, dest) >> 1;
@@ -2726,6 +2758,9 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc,
TCGType type,
OP_32_64(extract):
tgen_extract(s, args[0], args[1], args[2], args[3]);
break;
+ OP_32_64(sextract):
+ tgen_sextract(s, args[0], args[1], args[2], args[3]);
+ break;
case INDEX_op_clz_i64:
tgen_clz(s, args[0], args[1], args[2], const_args[2]);
@@ -3325,6 +3360,8 @@ tcg_target_op_def(TCGOpcode op, TCGType type, unsigned
flags)
case INDEX_op_extu_i32_i64:
case INDEX_op_extract_i32:
case INDEX_op_extract_i64:
+ case INDEX_op_sextract_i32:
+ case INDEX_op_sextract_i64:
case INDEX_op_ctpop_i32:
case INDEX_op_ctpop_i64:
return C_O1_I1(r, r);
--
2.43.0
- [PULL 40/68] tcg: Add TCG_OPF_NOT_PRESENT to opcodes without inputs or outputs, (continued)
- [PULL 40/68] tcg: Add TCG_OPF_NOT_PRESENT to opcodes without inputs or outputs, Richard Henderson, 2025/01/17
- [PULL 42/68] tcg: Add TCGType argument to tcg_out_op, Richard Henderson, 2025/01/17
- [PULL 43/68] tcg: Remove TCG_OPF_64BIT, Richard Henderson, 2025/01/17
- [PULL 45/68] tcg: Replace IMPLVEC with TCG_OPF_VECTOR, Richard Henderson, 2025/01/17
- [PULL 48/68] tcg/i386: Fold the ext{8, 16, 32}[us] cases into {s}extract, Richard Henderson, 2025/01/17
- [PULL 44/68] tcg: Drop implementation checks from tcg-opc.h, Richard Henderson, 2025/01/17
- [PULL 46/68] tcg/mips: Expand bswap unconditionally, Richard Henderson, 2025/01/17
- [PULL 50/68] tcg/aarch64: Expand extract with offset 0 with andi, Richard Henderson, 2025/01/17
- [PULL 52/68] tcg/loongarch64: Fold the ext{8, 16, 32}[us] cases into {s}extract, Richard Henderson, 2025/01/17
- [PULL 53/68] tcg/mips: Fold the ext{8, 16, 32}[us] cases into {s}extract, Richard Henderson, 2025/01/17
- [PULL 57/68] tcg/s390x: Fold the ext{8, 16, 32}[us] cases into {s}extract,
Richard Henderson <=
- [PULL 58/68] tcg/sparc64: Use SRA, SRL for {s}extract_i64, Richard Henderson, 2025/01/17
- [PULL 49/68] tcg/aarch64: Provide TCG_TARGET_{s}extract_valid, Richard Henderson, 2025/01/17
- [PULL 47/68] tcg/i386: Handle all 8-bit extensions for i686, Richard Henderson, 2025/01/17
- [PULL 64/68] tcg/riscv: Use BEXTI for single-bit extractions, Richard Henderson, 2025/01/17
- [PULL 63/68] util/cpuinfo-riscv: Detect Zbs, Richard Henderson, 2025/01/17
- [PULL 62/68] tcg: Remove TCG_TARGET_HAS_deposit_{i32,i64}, Richard Henderson, 2025/01/17
- [PULL 51/68] tcg/arm: Add full [US]XT[BH] into {s}extract, Richard Henderson, 2025/01/17
- [PULL 54/68] tcg/ppc: Fold the ext{8, 16, 32}[us] cases into {s}extract, Richard Henderson, 2025/01/17
- [PULL 56/68] tcg/riscv: Use SRAIW, SRLIW for {s}extract_i64, Richard Henderson, 2025/01/17
- [PULL 60/68] tcg/tci: Remove assertions for deposit and extract, Richard Henderson, 2025/01/17