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[PULL 64/68] tcg/riscv: Use BEXTI for single-bit extractions
From: |
Richard Henderson |
Subject: |
[PULL 64/68] tcg/riscv: Use BEXTI for single-bit extractions |
Date: |
Fri, 17 Jan 2025 10:24:52 -0800 |
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-ID: <20250102181601.1421059-3-richard.henderson@linaro.org>
---
tcg/riscv/tcg-target-has.h | 8 +++++++-
tcg/riscv/tcg-target.c.inc | 11 +++++++++--
2 files changed, 16 insertions(+), 3 deletions(-)
diff --git a/tcg/riscv/tcg-target-has.h b/tcg/riscv/tcg-target-has.h
index 0f9cc04f8c..f35f9b31f5 100644
--- a/tcg/riscv/tcg-target-has.h
+++ b/tcg/riscv/tcg-target-has.h
@@ -110,7 +110,13 @@ tcg_target_extract_valid(TCGType type, unsigned ofs,
unsigned len)
/* ofs > 0 uses SRLIW; ofs == 0 uses add.uw. */
return ofs || (cpuinfo & CPUINFO_ZBA);
}
- return (cpuinfo & CPUINFO_ZBB) && ofs == 0 && len == 16;
+ switch (len) {
+ case 1:
+ return (cpuinfo & CPUINFO_ZBS) && ofs != 0;
+ case 16:
+ return (cpuinfo & CPUINFO_ZBB) && ofs == 0;
+ }
+ return false;
}
#define TCG_TARGET_extract_valid tcg_target_extract_valid
diff --git a/tcg/riscv/tcg-target.c.inc b/tcg/riscv/tcg-target.c.inc
index 4f6e18f59e..61dc310c1a 100644
--- a/tcg/riscv/tcg-target.c.inc
+++ b/tcg/riscv/tcg-target.c.inc
@@ -163,6 +163,7 @@ typedef enum {
OPC_ANDI = 0x7013,
OPC_AUIPC = 0x17,
OPC_BEQ = 0x63,
+ OPC_BEXTI = 0x48005013,
OPC_BGE = 0x5063,
OPC_BGEU = 0x7063,
OPC_BLT = 0x4063,
@@ -2354,9 +2355,15 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc,
TCGType type,
}
/* FALLTHRU */
case INDEX_op_extract_i32:
- if (a2 == 0 && args[3] == 16) {
+ switch (args[3]) {
+ case 1:
+ tcg_out_opc_imm(s, OPC_BEXTI, a0, a1, a2);
+ break;
+ case 16:
+ tcg_debug_assert(a2 == 0);
tcg_out_ext16u(s, a0, a1);
- } else {
+ break;
+ default:
g_assert_not_reached();
}
break;
--
2.43.0
- [PULL 48/68] tcg/i386: Fold the ext{8, 16, 32}[us] cases into {s}extract, (continued)
- [PULL 48/68] tcg/i386: Fold the ext{8, 16, 32}[us] cases into {s}extract, Richard Henderson, 2025/01/17
- [PULL 44/68] tcg: Drop implementation checks from tcg-opc.h, Richard Henderson, 2025/01/17
- [PULL 46/68] tcg/mips: Expand bswap unconditionally, Richard Henderson, 2025/01/17
- [PULL 50/68] tcg/aarch64: Expand extract with offset 0 with andi, Richard Henderson, 2025/01/17
- [PULL 52/68] tcg/loongarch64: Fold the ext{8, 16, 32}[us] cases into {s}extract, Richard Henderson, 2025/01/17
- [PULL 53/68] tcg/mips: Fold the ext{8, 16, 32}[us] cases into {s}extract, Richard Henderson, 2025/01/17
- [PULL 57/68] tcg/s390x: Fold the ext{8, 16, 32}[us] cases into {s}extract, Richard Henderson, 2025/01/17
- [PULL 58/68] tcg/sparc64: Use SRA, SRL for {s}extract_i64, Richard Henderson, 2025/01/17
- [PULL 49/68] tcg/aarch64: Provide TCG_TARGET_{s}extract_valid, Richard Henderson, 2025/01/17
- [PULL 47/68] tcg/i386: Handle all 8-bit extensions for i686, Richard Henderson, 2025/01/17
- [PULL 64/68] tcg/riscv: Use BEXTI for single-bit extractions,
Richard Henderson <=
- [PULL 63/68] util/cpuinfo-riscv: Detect Zbs, Richard Henderson, 2025/01/17
- [PULL 62/68] tcg: Remove TCG_TARGET_HAS_deposit_{i32,i64}, Richard Henderson, 2025/01/17
- [PULL 51/68] tcg/arm: Add full [US]XT[BH] into {s}extract, Richard Henderson, 2025/01/17
- [PULL 54/68] tcg/ppc: Fold the ext{8, 16, 32}[us] cases into {s}extract, Richard Henderson, 2025/01/17
- [PULL 56/68] tcg/riscv: Use SRAIW, SRLIW for {s}extract_i64, Richard Henderson, 2025/01/17
- [PULL 60/68] tcg/tci: Remove assertions for deposit and extract, Richard Henderson, 2025/01/17
- [PULL 55/68] tcg/riscv64: Fold the ext{8, 16, 32}[us] cases into {s}extract, Richard Henderson, 2025/01/17
- [PULL 66/68] tcg: Document tb_lookup() and tcg_tb_lookup(), Richard Henderson, 2025/01/17
- [PULL 61/68] tcg: Remove TCG_TARGET_HAS_{s}extract_{i32,i64}, Richard Henderson, 2025/01/17
- [PULL 67/68] accel/tcg: Call tcg_tb_insert() for one-insn TBs, Richard Henderson, 2025/01/17