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[PULL 47/68] tcg/i386: Handle all 8-bit extensions for i686
From: |
Richard Henderson |
Subject: |
[PULL 47/68] tcg/i386: Handle all 8-bit extensions for i686 |
Date: |
Fri, 17 Jan 2025 10:24:35 -0800 |
When we generalize {s}extract_i32, we'll lose the
specific register constraints on ext8u and ext8s.
It's just as easy to emit a couple of insns instead.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
tcg/i386/tcg-target.c.inc | 23 +++++++++++++++++++----
1 file changed, 19 insertions(+), 4 deletions(-)
diff --git a/tcg/i386/tcg-target.c.inc b/tcg/i386/tcg-target.c.inc
index 8d1057cdb3..ed064c38d4 100644
--- a/tcg/i386/tcg-target.c.inc
+++ b/tcg/i386/tcg-target.c.inc
@@ -1329,16 +1329,31 @@ static inline void tcg_out_rolw_8(TCGContext *s, int
reg)
static void tcg_out_ext8u(TCGContext *s, TCGReg dest, TCGReg src)
{
- /* movzbl */
- tcg_debug_assert(src < 4 || TCG_TARGET_REG_BITS == 64);
+ if (TCG_TARGET_REG_BITS == 32 && src >= 4) {
+ tcg_out_mov(s, TCG_TYPE_I32, dest, src);
+ if (dest >= 4) {
+ tcg_out_modrm(s, OPC_ARITH_EvIz, ARITH_AND, dest);
+ tcg_out32(s, 0xff);
+ return;
+ }
+ src = dest;
+ }
tcg_out_modrm(s, OPC_MOVZBL + P_REXB_RM, dest, src);
}
static void tcg_out_ext8s(TCGContext *s, TCGType type, TCGReg dest, TCGReg src)
{
int rexw = type == TCG_TYPE_I32 ? 0 : P_REXW;
- /* movsbl */
- tcg_debug_assert(src < 4 || TCG_TARGET_REG_BITS == 64);
+
+ if (TCG_TARGET_REG_BITS == 32 && src >= 4) {
+ tcg_out_mov(s, TCG_TYPE_I32, dest, src);
+ if (dest >= 4) {
+ tcg_out_shifti(s, SHIFT_SHL, dest, 24);
+ tcg_out_shifti(s, SHIFT_SAR, dest, 24);
+ return;
+ }
+ src = dest;
+ }
tcg_out_modrm(s, OPC_MOVSBL + P_REXB_RM + rexw, dest, src);
}
--
2.43.0
- [PULL 45/68] tcg: Replace IMPLVEC with TCG_OPF_VECTOR, (continued)
- [PULL 45/68] tcg: Replace IMPLVEC with TCG_OPF_VECTOR, Richard Henderson, 2025/01/17
- [PULL 48/68] tcg/i386: Fold the ext{8, 16, 32}[us] cases into {s}extract, Richard Henderson, 2025/01/17
- [PULL 44/68] tcg: Drop implementation checks from tcg-opc.h, Richard Henderson, 2025/01/17
- [PULL 46/68] tcg/mips: Expand bswap unconditionally, Richard Henderson, 2025/01/17
- [PULL 50/68] tcg/aarch64: Expand extract with offset 0 with andi, Richard Henderson, 2025/01/17
- [PULL 52/68] tcg/loongarch64: Fold the ext{8, 16, 32}[us] cases into {s}extract, Richard Henderson, 2025/01/17
- [PULL 53/68] tcg/mips: Fold the ext{8, 16, 32}[us] cases into {s}extract, Richard Henderson, 2025/01/17
- [PULL 57/68] tcg/s390x: Fold the ext{8, 16, 32}[us] cases into {s}extract, Richard Henderson, 2025/01/17
- [PULL 58/68] tcg/sparc64: Use SRA, SRL for {s}extract_i64, Richard Henderson, 2025/01/17
- [PULL 49/68] tcg/aarch64: Provide TCG_TARGET_{s}extract_valid, Richard Henderson, 2025/01/17
- [PULL 47/68] tcg/i386: Handle all 8-bit extensions for i686,
Richard Henderson <=
- [PULL 64/68] tcg/riscv: Use BEXTI for single-bit extractions, Richard Henderson, 2025/01/17
- [PULL 63/68] util/cpuinfo-riscv: Detect Zbs, Richard Henderson, 2025/01/17
- [PULL 62/68] tcg: Remove TCG_TARGET_HAS_deposit_{i32,i64}, Richard Henderson, 2025/01/17
- [PULL 51/68] tcg/arm: Add full [US]XT[BH] into {s}extract, Richard Henderson, 2025/01/17
- [PULL 54/68] tcg/ppc: Fold the ext{8, 16, 32}[us] cases into {s}extract, Richard Henderson, 2025/01/17
- [PULL 56/68] tcg/riscv: Use SRAIW, SRLIW for {s}extract_i64, Richard Henderson, 2025/01/17
- [PULL 60/68] tcg/tci: Remove assertions for deposit and extract, Richard Henderson, 2025/01/17
- [PULL 55/68] tcg/riscv64: Fold the ext{8, 16, 32}[us] cases into {s}extract, Richard Henderson, 2025/01/17
- [PULL 66/68] tcg: Document tb_lookup() and tcg_tb_lookup(), Richard Henderson, 2025/01/17
- [PULL 61/68] tcg: Remove TCG_TARGET_HAS_{s}extract_{i32,i64}, Richard Henderson, 2025/01/17