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[PULL 52/68] tcg/loongarch64: Fold the ext{8, 16, 32}[us] cases into {s}
From: |
Richard Henderson |
Subject: |
[PULL 52/68] tcg/loongarch64: Fold the ext{8, 16, 32}[us] cases into {s}extract |
Date: |
Fri, 17 Jan 2025 10:24:40 -0800 |
Accept byte and word extensions with the extract opcodes.
This is preparatory to removing the specialized extracts.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
tcg/loongarch64/tcg-target-has.h | 15 ++++++++++++--
tcg/loongarch64/tcg-target.c.inc | 34 ++++++++++++++++++++++++++++++--
2 files changed, 45 insertions(+), 4 deletions(-)
diff --git a/tcg/loongarch64/tcg-target-has.h b/tcg/loongarch64/tcg-target-has.h
index e4333c36c6..ac7d2fcdf9 100644
--- a/tcg/loongarch64/tcg-target-has.h
+++ b/tcg/loongarch64/tcg-target-has.h
@@ -17,7 +17,7 @@
#define TCG_TARGET_HAS_rot_i32 1
#define TCG_TARGET_HAS_deposit_i32 1
#define TCG_TARGET_HAS_extract_i32 1
-#define TCG_TARGET_HAS_sextract_i32 0
+#define TCG_TARGET_HAS_sextract_i32 1
#define TCG_TARGET_HAS_extract2_i32 0
#define TCG_TARGET_HAS_add2_i32 0
#define TCG_TARGET_HAS_sub2_i32 0
@@ -52,7 +52,7 @@
#define TCG_TARGET_HAS_rot_i64 1
#define TCG_TARGET_HAS_deposit_i64 1
#define TCG_TARGET_HAS_extract_i64 1
-#define TCG_TARGET_HAS_sextract_i64 0
+#define TCG_TARGET_HAS_sextract_i64 1
#define TCG_TARGET_HAS_extract2_i64 0
#define TCG_TARGET_HAS_extr_i64_i32 1
#define TCG_TARGET_HAS_ext8s_i64 1
@@ -109,5 +109,16 @@
#define TCG_TARGET_HAS_cmpsel_vec 0
#define TCG_TARGET_HAS_tst_vec 0
+#define TCG_TARGET_extract_valid(type, ofs, len) 1
+
+static inline bool
+tcg_target_sextract_valid(TCGType type, unsigned ofs, unsigned len)
+{
+ if (type == TCG_TYPE_I64 && ofs + len == 32) {
+ return true;
+ }
+ return ofs == 0 && (len == 8 || len == 16);
+}
+#define TCG_TARGET_sextract_valid tcg_target_sextract_valid
#endif
diff --git a/tcg/loongarch64/tcg-target.c.inc b/tcg/loongarch64/tcg-target.c.inc
index 3dff29facb..cebe8dd354 100644
--- a/tcg/loongarch64/tcg-target.c.inc
+++ b/tcg/loongarch64/tcg-target.c.inc
@@ -1375,10 +1375,38 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc,
TCGType type,
break;
case INDEX_op_extract_i32:
- tcg_out_opc_bstrpick_w(s, a0, a1, a2, a2 + args[3] - 1);
+ if (a2 == 0 && args[3] <= 12) {
+ tcg_out_opc_andi(s, a0, a1, (1 << args[3]) - 1);
+ } else {
+ tcg_out_opc_bstrpick_w(s, a0, a1, a2, a2 + args[3] - 1);
+ }
break;
case INDEX_op_extract_i64:
- tcg_out_opc_bstrpick_d(s, a0, a1, a2, a2 + args[3] - 1);
+ if (a2 == 0 && args[3] <= 12) {
+ tcg_out_opc_andi(s, a0, a1, (1 << args[3]) - 1);
+ } else {
+ tcg_out_opc_bstrpick_d(s, a0, a1, a2, a2 + args[3] - 1);
+ }
+ break;
+
+ case INDEX_op_sextract_i64:
+ if (a2 + args[3] == 32) {
+ if (a2 == 0) {
+ tcg_out_ext32s(s, a0, a1);
+ } else {
+ tcg_out_opc_srai_w(s, a0, a1, a2);
+ }
+ break;
+ }
+ /* FALLTHRU */
+ case INDEX_op_sextract_i32:
+ if (a2 == 0 && args[3] == 8) {
+ tcg_out_ext8s(s, TCG_TYPE_REG, a0, a1);
+ } else if (a2 == 0 && args[3] == 16) {
+ tcg_out_ext16s(s, TCG_TYPE_REG, a0, a1);
+ } else {
+ g_assert_not_reached();
+ }
break;
case INDEX_op_deposit_i32:
@@ -2243,6 +2271,8 @@ tcg_target_op_def(TCGOpcode op, TCGType type, unsigned
flags)
case INDEX_op_not_i64:
case INDEX_op_extract_i32:
case INDEX_op_extract_i64:
+ case INDEX_op_sextract_i32:
+ case INDEX_op_sextract_i64:
case INDEX_op_bswap16_i32:
case INDEX_op_bswap16_i64:
case INDEX_op_bswap32_i32:
--
2.43.0
- [PULL 39/68] tcg: Validate op supported in opcode_args_ct, (continued)
- [PULL 39/68] tcg: Validate op supported in opcode_args_ct, Richard Henderson, 2025/01/17
- [PULL 41/68] tcg: Pass type and flags to tcg_target_op_def, Richard Henderson, 2025/01/17
- [PULL 40/68] tcg: Add TCG_OPF_NOT_PRESENT to opcodes without inputs or outputs, Richard Henderson, 2025/01/17
- [PULL 42/68] tcg: Add TCGType argument to tcg_out_op, Richard Henderson, 2025/01/17
- [PULL 43/68] tcg: Remove TCG_OPF_64BIT, Richard Henderson, 2025/01/17
- [PULL 45/68] tcg: Replace IMPLVEC with TCG_OPF_VECTOR, Richard Henderson, 2025/01/17
- [PULL 48/68] tcg/i386: Fold the ext{8, 16, 32}[us] cases into {s}extract, Richard Henderson, 2025/01/17
- [PULL 44/68] tcg: Drop implementation checks from tcg-opc.h, Richard Henderson, 2025/01/17
- [PULL 46/68] tcg/mips: Expand bswap unconditionally, Richard Henderson, 2025/01/17
- [PULL 50/68] tcg/aarch64: Expand extract with offset 0 with andi, Richard Henderson, 2025/01/17
- [PULL 52/68] tcg/loongarch64: Fold the ext{8, 16, 32}[us] cases into {s}extract,
Richard Henderson <=
- [PULL 53/68] tcg/mips: Fold the ext{8, 16, 32}[us] cases into {s}extract, Richard Henderson, 2025/01/17
- [PULL 57/68] tcg/s390x: Fold the ext{8, 16, 32}[us] cases into {s}extract, Richard Henderson, 2025/01/17
- [PULL 58/68] tcg/sparc64: Use SRA, SRL for {s}extract_i64, Richard Henderson, 2025/01/17
- [PULL 49/68] tcg/aarch64: Provide TCG_TARGET_{s}extract_valid, Richard Henderson, 2025/01/17
- [PULL 47/68] tcg/i386: Handle all 8-bit extensions for i686, Richard Henderson, 2025/01/17
- [PULL 64/68] tcg/riscv: Use BEXTI for single-bit extractions, Richard Henderson, 2025/01/17
- [PULL 63/68] util/cpuinfo-riscv: Detect Zbs, Richard Henderson, 2025/01/17
- [PULL 62/68] tcg: Remove TCG_TARGET_HAS_deposit_{i32,i64}, Richard Henderson, 2025/01/17
- [PULL 51/68] tcg/arm: Add full [US]XT[BH] into {s}extract, Richard Henderson, 2025/01/17
- [PULL 54/68] tcg/ppc: Fold the ext{8, 16, 32}[us] cases into {s}extract, Richard Henderson, 2025/01/17