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[PULL 04/34] hw: riscv: Allow large kernels to boot by moving the initrd
From: |
Alistair Francis |
Subject: |
[PULL 04/34] hw: riscv: Allow large kernels to boot by moving the initrd further away in RAM |
Date: |
Fri, 8 Mar 2024 21:11:22 +1000 |
From: Alexandre Ghiti <alexghiti@rivosinc.com>
Currently, the initrd is placed at 128MB, which overlaps with the kernel
when it is large (for example syzbot kernels are). From the kernel side,
there is no reason we could not push the initrd further away in memory
to accommodate large kernels, so move the initrd at 512MB when possible.
The ideal solution would have been to place the initrd based on the
kernel size but we actually can't since the bss size is not known when
the image is loaded by load_image_targphys_as() and the initrd would
then overlap with this section.
Signed-off-by: Alexandre Ghiti <alexghiti@rivosinc.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Message-ID: <20240206154042.514698-1-alexghiti@rivosinc.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
---
hw/riscv/boot.c | 12 ++++++------
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/hw/riscv/boot.c b/hw/riscv/boot.c
index 12f9792245..09878e722c 100644
--- a/hw/riscv/boot.c
+++ b/hw/riscv/boot.c
@@ -189,13 +189,13 @@ static void riscv_load_initrd(MachineState *machine,
uint64_t kernel_entry)
* kernel is uncompressed it will not clobber the initrd. However
* on boards without much RAM we must ensure that we still leave
* enough room for a decent sized initrd, and on boards with large
- * amounts of RAM we must avoid the initrd being so far up in RAM
- * that it is outside lowmem and inaccessible to the kernel.
- * So for boards with less than 256MB of RAM we put the initrd
- * halfway into RAM, and for boards with 256MB of RAM or more we put
- * the initrd at 128MB.
+ * amounts of RAM, we put the initrd at 512MB to allow large kernels
+ * to boot.
+ * So for boards with less than 1GB of RAM we put the initrd
+ * halfway into RAM, and for boards with 1GB of RAM or more we put
+ * the initrd at 512MB.
*/
- start = kernel_entry + MIN(mem_size / 2, 128 * MiB);
+ start = kernel_entry + MIN(mem_size / 2, 512 * MiB);
size = load_ramdisk(filename, start, mem_size - start);
if (size == -1) {
--
2.44.0
- [PULL 00/34] riscv-to-apply queue, Alistair Francis, 2024/03/08
- [PULL 02/34] hw/arm/virt-acpi-build.c: Migrate SPCR creation to common location, Alistair Francis, 2024/03/08
- [PULL 03/34] hw/riscv/virt-acpi-build.c: Generate SPCR table, Alistair Francis, 2024/03/08
- [PULL 01/34] target/riscv: Update $ra with current $pc in trans_cm_jalt(), Alistair Francis, 2024/03/08
- [PULL 05/34] linux-user/riscv: Add Zicboz extensions to hwprobe, Alistair Francis, 2024/03/08
- [PULL 07/34] target/riscv/tcg: set 'mmu' with 'satp' in cpu_set_profile(), Alistair Francis, 2024/03/08
- [PULL 06/34] linux-user/riscv: Sync hwprobe keys with Linux, Alistair Francis, 2024/03/08
- [PULL 04/34] hw: riscv: Allow large kernels to boot by moving the initrd further away in RAM,
Alistair Francis <=
- [PULL 08/34] target/riscv: add riscv,isa to named features, Alistair Francis, 2024/03/08
- [PULL 09/34] target/riscv: add remaining named features, Alistair Francis, 2024/03/08
- [PULL 10/34] target/riscv: Reset henvcfg to zero, Alistair Francis, 2024/03/08
- [PULL 11/34] target/riscv: Gate hardware A/D PTE bit updating, Alistair Francis, 2024/03/08
- [PULL 12/34] target/riscv: Promote svade to a normal extension, Alistair Francis, 2024/03/08
- [PULL 13/34] target/riscv: FIX xATP_MODE validation, Alistair Francis, 2024/03/08
- [PULL 14/34] target/riscv: UPDATE xATP write CSR, Alistair Francis, 2024/03/08