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[PULL 30/48] arm/trace: Fix hex printing
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From: |
Peter Maydell |
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Subject: |
[PULL 30/48] arm/trace: Fix hex printing |
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Date: |
Tue, 27 Oct 2020 11:44:20 +0000 |
From: "Dr. David Alan Gilbert" <dgilbert@redhat.com>
Use of 0x%d - make up our mind as 0x%x
Signed-off-by: Dr. David Alan Gilbert <dgilbert@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Acked-by: Eric Auger <eric.auger@redhat.com>
Message-id: 20201014193355.53074-1-dgilbert@redhat.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
hw/arm/trace-events | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/arm/trace-events b/hw/arm/trace-events
index c8a4d80f6bd..a335ee891db 100644
--- a/hw/arm/trace-events
+++ b/hw/arm/trace-events
@@ -41,7 +41,7 @@ smmuv3_get_cd(uint64_t addr) "CD addr: 0x%"PRIx64
smmuv3_decode_cd(uint32_t oas) "oas=%d"
smmuv3_decode_cd_tt(int i, uint32_t tsz, uint64_t ttb, uint32_t granule_sz,
bool had) "TT[%d]:tsz:%d ttb:0x%"PRIx64" granule_sz:%d had:%d"
smmuv3_cmdq_cfgi_ste(int streamid) "streamid =%d"
-smmuv3_cmdq_cfgi_ste_range(int start, int end) "start=0x%d - end=0x%d"
+smmuv3_cmdq_cfgi_ste_range(int start, int end) "start=0x%x - end=0x%x"
smmuv3_cmdq_cfgi_cd(uint32_t sid) "streamid = %d"
smmuv3_config_cache_hit(uint32_t sid, uint32_t hits, uint32_t misses, uint32_t
perc) "Config cache HIT for sid %d (hits=%d, misses=%d, hit rate=%d)"
smmuv3_config_cache_miss(uint32_t sid, uint32_t hits, uint32_t misses,
uint32_t perc) "Config cache MISS for sid %d (hits=%d, misses=%d, hit rate=%d)"
--
2.20.1
- [PULL 24/48] hw/arm/bcm2836: Only provide "enabled-cpus" property to multicore SoCs, (continued)
- [PULL 24/48] hw/arm/bcm2836: Only provide "enabled-cpus" property to multicore SoCs, Peter Maydell, 2020/10/27
- [PULL 23/48] hw/arm/bcm2836: Introduce BCM283XClass::core_count, Peter Maydell, 2020/10/27
- [PULL 26/48] hw/arm/bcm2836: Introduce the BCM2835 SoC, Peter Maydell, 2020/10/27
- [PULL 25/48] hw/arm/bcm2836: Split out common realize() code, Peter Maydell, 2020/10/27
- [PULL 28/48] hw/arm/raspi: Add the Raspberry Pi Zero machine, Peter Maydell, 2020/10/27
- [PULL 27/48] hw/arm/raspi: Add the Raspberry Pi A+ machine, Peter Maydell, 2020/10/27
- [PULL 33/48] hw/arm/raspi: fix CPRMAN base address, Peter Maydell, 2020/10/27
- [PULL 31/48] hw/core/clock: provide the VMSTATE_ARRAY_CLOCK macro, Peter Maydell, 2020/10/27
- [PULL 29/48] hw/arm/raspi: Add the Raspberry Pi 3 model A+, Peter Maydell, 2020/10/27
- [PULL 32/48] hw/core/clock: trace clock values in Hz instead of ns, Peter Maydell, 2020/10/27
- [PULL 30/48] arm/trace: Fix hex printing,
Peter Maydell <=
- [PULL 34/48] hw/arm/raspi: add a skeleton implementation of the CPRMAN, Peter Maydell, 2020/10/27
- [PULL 35/48] hw/misc/bcm2835_cprman: add a PLL skeleton implementation, Peter Maydell, 2020/10/27
- [PULL 36/48] hw/misc/bcm2835_cprman: implement PLLs behaviour, Peter Maydell, 2020/10/27
- [PULL 37/48] hw/misc/bcm2835_cprman: add a PLL channel skeleton implementation, Peter Maydell, 2020/10/27
- [PULL 38/48] hw/misc/bcm2835_cprman: implement PLL channels behaviour, Peter Maydell, 2020/10/27
- [PULL 39/48] hw/misc/bcm2835_cprman: add a clock mux skeleton implementation, Peter Maydell, 2020/10/27
- [PULL 42/48] hw/misc/bcm2835_cprman: add sane reset values to the registers, Peter Maydell, 2020/10/27
- [PULL 40/48] hw/misc/bcm2835_cprman: implement clock mux behaviour, Peter Maydell, 2020/10/27
- [PULL 41/48] hw/misc/bcm2835_cprman: add the DSI0HSCK multiplexer, Peter Maydell, 2020/10/27
- [PULL 44/48] hw/arm/bcm2835_peripherals: connect the UART clock, Peter Maydell, 2020/10/27