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[PULL 24/48] hw/arm/bcm2836: Only provide "enabled-cpus" property to mul
From: |
Peter Maydell |
Subject: |
[PULL 24/48] hw/arm/bcm2836: Only provide "enabled-cpus" property to multicore SoCs |
Date: |
Tue, 27 Oct 2020 11:44:14 +0000 |
From: Philippe Mathieu-Daudé <f4bug@amsat.org>
It makes no sense to set enabled-cpus=0 on single core SoCs.
Reviewed-by: Luc Michel <luc.michel@greensocs.com>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-id: 20201024170127.3592182-5-f4bug@amsat.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
hw/arm/bcm2836.c | 15 +++++++--------
1 file changed, 7 insertions(+), 8 deletions(-)
diff --git a/hw/arm/bcm2836.c b/hw/arm/bcm2836.c
index c5d46a8e805..fcb2c9c3e73 100644
--- a/hw/arm/bcm2836.c
+++ b/hw/arm/bcm2836.c
@@ -34,6 +34,9 @@ typedef struct BCM283XClass {
#define BCM283X_GET_CLASS(obj) \
OBJECT_GET_CLASS(BCM283XClass, (obj), TYPE_BCM283X)
+static Property bcm2836_enabled_cores_property =
+ DEFINE_PROP_UINT32("enabled-cpus", BCM283XState, enabled_cpus, 0);
+
static void bcm2836_init(Object *obj)
{
BCM283XState *s = BCM283X(obj);
@@ -44,6 +47,10 @@ static void bcm2836_init(Object *obj)
object_initialize_child(obj, "cpu[*]", &s->cpu[n].core,
bc->cpu_type);
}
+ if (bc->core_count > 1) {
+ qdev_property_add_static(DEVICE(obj), &bcm2836_enabled_cores_property);
+ qdev_prop_set_uint32(DEVICE(obj), "enabled-cpus", bc->core_count);
+ }
object_initialize_child(obj, "control", &s->control, TYPE_BCM2836_CONTROL);
@@ -130,12 +137,6 @@ static void bcm2836_realize(DeviceState *dev, Error **errp)
}
}
-static Property bcm2836_props[] = {
- DEFINE_PROP_UINT32("enabled-cpus", BCM283XState, enabled_cpus,
- BCM283X_NCPUS),
- DEFINE_PROP_END_OF_LIST()
-};
-
static void bcm283x_class_init(ObjectClass *oc, void *data)
{
DeviceClass *dc = DEVICE_CLASS(oc);
@@ -155,7 +156,6 @@ static void bcm2836_class_init(ObjectClass *oc, void *data)
bc->ctrl_base = 0x40000000;
bc->clusterid = 0xf;
dc->realize = bcm2836_realize;
- device_class_set_props(dc, bcm2836_props);
};
#ifdef TARGET_AARCH64
@@ -170,7 +170,6 @@ static void bcm2837_class_init(ObjectClass *oc, void *data)
bc->ctrl_base = 0x40000000;
bc->clusterid = 0x0;
dc->realize = bcm2836_realize;
- device_class_set_props(dc, bcm2836_props);
};
#endif
--
2.20.1
- [PULL 15/48] Move npcm7xx_timer_reached_zero call out of npcm7xx_timer_pause, (continued)
- [PULL 15/48] Move npcm7xx_timer_reached_zero call out of npcm7xx_timer_pause, Peter Maydell, 2020/10/27
- [PULL 17/48] hw/misc: Add npcm7xx random number generator, Peter Maydell, 2020/10/27
- [PULL 16/48] hw/timer: Adding watchdog for NPCM7XX Timer., Peter Maydell, 2020/10/27
- [PULL 11/48] linux-user/elfload: Parse GNU_PROPERTY_AARCH64_FEATURE_1_AND, Peter Maydell, 2020/10/27
- [PULL 12/48] tests/tcg/aarch64: Add bti smoke tests, Peter Maydell, 2020/10/27
- [PULL 18/48] hw/arm/npcm7xx: Add EHCI and OHCI controllers, Peter Maydell, 2020/10/27
- [PULL 20/48] hw/arm/smmuv3: Set the restoration priority of the vSMMUv3 explicitly, Peter Maydell, 2020/10/27
- [PULL 21/48] hw/arm/bcm2836: Restrict BCM283XInfo declaration to C source, Peter Maydell, 2020/10/27
- [PULL 19/48] hw/gpio: Add GPIO model for Nuvoton NPCM7xx, Peter Maydell, 2020/10/27
- [PULL 22/48] hw/arm/bcm2836: QOM'ify more by adding class_init() to each SoC type, Peter Maydell, 2020/10/27
- [PULL 24/48] hw/arm/bcm2836: Only provide "enabled-cpus" property to multicore SoCs,
Peter Maydell <=
- [PULL 23/48] hw/arm/bcm2836: Introduce BCM283XClass::core_count, Peter Maydell, 2020/10/27
- [PULL 26/48] hw/arm/bcm2836: Introduce the BCM2835 SoC, Peter Maydell, 2020/10/27
- [PULL 25/48] hw/arm/bcm2836: Split out common realize() code, Peter Maydell, 2020/10/27
- [PULL 28/48] hw/arm/raspi: Add the Raspberry Pi Zero machine, Peter Maydell, 2020/10/27
- [PULL 27/48] hw/arm/raspi: Add the Raspberry Pi A+ machine, Peter Maydell, 2020/10/27
- [PULL 33/48] hw/arm/raspi: fix CPRMAN base address, Peter Maydell, 2020/10/27
- [PULL 31/48] hw/core/clock: provide the VMSTATE_ARRAY_CLOCK macro, Peter Maydell, 2020/10/27
- [PULL 29/48] hw/arm/raspi: Add the Raspberry Pi 3 model A+, Peter Maydell, 2020/10/27
- [PULL 32/48] hw/core/clock: trace clock values in Hz instead of ns, Peter Maydell, 2020/10/27
- [PULL 30/48] arm/trace: Fix hex printing, Peter Maydell, 2020/10/27