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[Qemu-ppc] [PULL 08/28] mac_newworld: wire up programmer switch to NMI h
From: |
David Gibson |
Subject: |
[Qemu-ppc] [PULL 08/28] mac_newworld: wire up programmer switch to NMI handler |
Date: |
Mon, 18 Jun 2018 13:53:04 +1000 |
From: Mark Cave-Ayland <address@hidden>
The programmer switch is wired up via an external GPIO pin and can be used
to aid debugging Mac guests.
Signed-off-by: Mark Cave-Ayland <address@hidden>
Signed-off-by: David Gibson <address@hidden>
---
hw/misc/macio/gpio.c | 13 +++++++++++++
1 file changed, 13 insertions(+)
diff --git a/hw/misc/macio/gpio.c b/hw/misc/macio/gpio.c
index 5630afdf18..9317df759c 100644
--- a/hw/misc/macio/gpio.c
+++ b/hw/misc/macio/gpio.c
@@ -28,6 +28,7 @@
#include "hw/ppc/mac.h"
#include "hw/misc/macio/macio.h"
#include "hw/misc/macio/gpio.h"
+#include "hw/nmi.h"
#include "qemu/log.h"
#include "trace.h"
@@ -193,13 +194,21 @@ static void macio_gpio_reset(DeviceState *dev)
macio_set_gpio(s, 1, true);
}
+static void macio_gpio_nmi(NMIState *n, int cpu_index, Error **errp)
+{
+ macio_set_gpio(MACIO_GPIO(n), 9, true);
+ macio_set_gpio(MACIO_GPIO(n), 9, false);
+}
+
static void macio_gpio_class_init(ObjectClass *oc, void *data)
{
DeviceClass *dc = DEVICE_CLASS(oc);
+ NMIClass *nc = NMI_CLASS(oc);
dc->realize = macio_gpio_realize;
dc->reset = macio_gpio_reset;
dc->vmsd = &vmstate_macio_gpio;
+ nc->nmi_monitor_handler = macio_gpio_nmi;
}
static const TypeInfo macio_gpio_init_info = {
@@ -208,6 +217,10 @@ static const TypeInfo macio_gpio_init_info = {
.instance_size = sizeof(MacIOGPIOState),
.instance_init = macio_gpio_init,
.class_init = macio_gpio_class_init,
+ .interfaces = (InterfaceInfo[]) {
+ { TYPE_NMI },
+ { }
+ },
};
static void macio_gpio_register_types(void)
--
2.17.1
- [Qemu-ppc] [PULL 00/28] ppc-for-3.0 queue 20180618, David Gibson, 2018/06/17
- [Qemu-ppc] [PULL 04/28] spapr: fix leak in h_client_architecture_support(), David Gibson, 2018/06/17
- [Qemu-ppc] [PULL 03/28] target/ppc: drop empty #if/#endif block, David Gibson, 2018/06/17
- [Qemu-ppc] [PULL 02/28] ppc/spapr_caps: Don't disable cap_cfpc on POWER8 by default, David Gibson, 2018/06/17
- [Qemu-ppc] [PULL 01/28] target/ppc: Don't require private l1d cache on POWER8 for cap_ppc_safe_cache, David Gibson, 2018/06/17
- [Qemu-ppc] [PULL 13/28] mos6522: only clear the shift register interrupt upon write, David Gibson, 2018/06/17
- [Qemu-ppc] [PULL 08/28] mac_newworld: wire up programmer switch to NMI handler,
David Gibson <=
- [Qemu-ppc] [PULL 09/28] adb: fix read reg 3 byte ordering, David Gibson, 2018/06/17
- [Qemu-ppc] [PULL 26/28] ppc/pnv: introduce a pnv_chip_core_realize() routine, David Gibson, 2018/06/17
- [Qemu-ppc] [PULL 14/28] mos6522: remove additional interrupt flag filter from mos6522_update_irq(), David Gibson, 2018/06/17
- [Qemu-ppc] [PULL 20/28] pnv: Clean up cpu realize path, David Gibson, 2018/06/17
- [Qemu-ppc] [PULL 15/28] mos6522: expose mos6522_update_irq() through MOS6522DeviceClass, David Gibson, 2018/06/17
- [Qemu-ppc] [PULL 16/28] sm501: Do not clear read only bits when writing registers, David Gibson, 2018/06/17
- [Qemu-ppc] [PULL 18/28] pnv: Fix some error handling cpu realize(), David Gibson, 2018/06/17
- [Qemu-ppc] [PULL 19/28] pnv_core: Allocate cpu thread objects individually, David Gibson, 2018/06/17
- [Qemu-ppc] [PULL 10/28] adb: add property to disable direct reg 3 writes, David Gibson, 2018/06/17
- [Qemu-ppc] [PULL 05/28] ppc: introduce Core99MachinesState for the mac99 machine, David Gibson, 2018/06/17