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[Qemu-ppc] [PULL 15/28] mos6522: expose mos6522_update_irq() through MOS
From: |
David Gibson |
Subject: |
[Qemu-ppc] [PULL 15/28] mos6522: expose mos6522_update_irq() through MOS6522DeviceClass |
Date: |
Mon, 18 Jun 2018 13:53:11 +1000 |
From: Mark Cave-Ayland <address@hidden>
In the case where we have an interrupt generated externally from inputs to
bits 1 and 2 of port A and/or port B, it is necessary to expose
mos6522_update_irq() so it can be called by the interrupt source.
Signed-off-by: Mark Cave-Ayland <address@hidden>
Signed-off-by: David Gibson <address@hidden>
---
hw/misc/mos6522.c | 1 +
include/hw/misc/mos6522.h | 1 +
2 files changed, 2 insertions(+)
diff --git a/hw/misc/mos6522.c b/hw/misc/mos6522.c
index 8d5b419825..14cff26c61 100644
--- a/hw/misc/mos6522.c
+++ b/hw/misc/mos6522.c
@@ -463,6 +463,7 @@ static void mos6522_class_init(ObjectClass *oc, void *data)
mdc->set_sr_int = mos6522_set_sr_int;
mdc->portB_write = mos6522_portB_write;
mdc->portA_write = mos6522_portA_write;
+ mdc->update_irq = mos6522_update_irq;
mdc->get_timer1_counter_value = mos6522_get_counter_value;
mdc->get_timer2_counter_value = mos6522_get_counter_value;
mdc->get_timer1_load_time = mos6522_get_load_time;
diff --git a/include/hw/misc/mos6522.h b/include/hw/misc/mos6522.h
index f52b41920b..03d9f0c059 100644
--- a/include/hw/misc/mos6522.h
+++ b/include/hw/misc/mos6522.h
@@ -134,6 +134,7 @@ typedef struct MOS6522DeviceClass {
void (*set_sr_int)(MOS6522State *dev);
void (*portB_write)(MOS6522State *dev);
void (*portA_write)(MOS6522State *dev);
+ void (*update_irq)(MOS6522State *dev);
/* These are used to influence the CUDA MacOS timebase calibration */
uint64_t (*get_timer1_counter_value)(MOS6522State *dev, MOS6522Timer *ti);
uint64_t (*get_timer2_counter_value)(MOS6522State *dev, MOS6522Timer *ti);
--
2.17.1
- [Qemu-ppc] [PULL 04/28] spapr: fix leak in h_client_architecture_support(), (continued)
- [Qemu-ppc] [PULL 04/28] spapr: fix leak in h_client_architecture_support(), David Gibson, 2018/06/17
- [Qemu-ppc] [PULL 03/28] target/ppc: drop empty #if/#endif block, David Gibson, 2018/06/17
- [Qemu-ppc] [PULL 02/28] ppc/spapr_caps: Don't disable cap_cfpc on POWER8 by default, David Gibson, 2018/06/17
- [Qemu-ppc] [PULL 01/28] target/ppc: Don't require private l1d cache on POWER8 for cap_ppc_safe_cache, David Gibson, 2018/06/17
- [Qemu-ppc] [PULL 13/28] mos6522: only clear the shift register interrupt upon write, David Gibson, 2018/06/17
- [Qemu-ppc] [PULL 08/28] mac_newworld: wire up programmer switch to NMI handler, David Gibson, 2018/06/17
- [Qemu-ppc] [PULL 09/28] adb: fix read reg 3 byte ordering, David Gibson, 2018/06/17
- [Qemu-ppc] [PULL 26/28] ppc/pnv: introduce a pnv_chip_core_realize() routine, David Gibson, 2018/06/17
- [Qemu-ppc] [PULL 14/28] mos6522: remove additional interrupt flag filter from mos6522_update_irq(), David Gibson, 2018/06/17
- [Qemu-ppc] [PULL 20/28] pnv: Clean up cpu realize path, David Gibson, 2018/06/17
- [Qemu-ppc] [PULL 15/28] mos6522: expose mos6522_update_irq() through MOS6522DeviceClass,
David Gibson <=
- [Qemu-ppc] [PULL 16/28] sm501: Do not clear read only bits when writing registers, David Gibson, 2018/06/17
- [Qemu-ppc] [PULL 18/28] pnv: Fix some error handling cpu realize(), David Gibson, 2018/06/17
- [Qemu-ppc] [PULL 19/28] pnv_core: Allocate cpu thread objects individually, David Gibson, 2018/06/17
- [Qemu-ppc] [PULL 10/28] adb: add property to disable direct reg 3 writes, David Gibson, 2018/06/17
- [Qemu-ppc] [PULL 05/28] ppc: introduce Core99MachinesState for the mac99 machine, David Gibson, 2018/06/17
- [Qemu-ppc] [PULL 22/28] spapr_cpu_core: convert last snprintf() to g_strdup_printf(), David Gibson, 2018/06/17
- [Qemu-ppc] [PULL 27/28] target/ppc, spapr: Move VPA information to machine_data, David Gibson, 2018/06/17
- [Qemu-ppc] [PULL 06/28] mac_newworld: add via machine option to control mac99 VIA/ADB configuration, David Gibson, 2018/06/17
- [Qemu-ppc] [PULL 24/28] spapr_cpu_core: add missing rollback on realization path, David Gibson, 2018/06/17
- [Qemu-ppc] [PULL 12/28] xics_kvm: fix a build break, David Gibson, 2018/06/17