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[PULL v1 07/14] hw/dma/xilinx_axidma: mm2s: Stream descriptor by descrip
From: |
Edgar E. Iglesias |
Subject: |
[PULL v1 07/14] hw/dma/xilinx_axidma: mm2s: Stream descriptor by descriptor |
Date: |
Thu, 14 May 2020 16:13:55 +0200 |
From: "Edgar E. Iglesias" <address@hidden>
Stream descriptor by descriptor from memory instead of
buffering entire packets before pushing. This enables
non-packet streaming clients to work and also lifts the
limitation that our internal DMA buffer needs to be able
to hold entire packets.
Reviewed-by: Alistair Francis <address@hidden>
Signed-off-by: Edgar E. Iglesias <address@hidden>
Message-Id: <address@hidden>
---
hw/dma/xilinx_axidma.c | 31 +++++++++++++++++--------------
1 file changed, 17 insertions(+), 14 deletions(-)
diff --git a/hw/dma/xilinx_axidma.c b/hw/dma/xilinx_axidma.c
index a770e12c96..101d32a965 100644
--- a/hw/dma/xilinx_axidma.c
+++ b/hw/dma/xilinx_axidma.c
@@ -111,7 +111,6 @@ struct Stream {
int nr;
struct SDesc desc;
- int pos;
unsigned int complete_cnt;
uint32_t regs[R_MAX];
uint8_t app[20];
@@ -267,7 +266,9 @@ static void stream_process_mem2s(struct Stream *s,
StreamSlave *tx_data_dev,
StreamSlave *tx_control_dev)
{
uint32_t prev_d;
- unsigned int txlen;
+ uint32_t txlen;
+ uint64_t addr;
+ bool eop;
if (!stream_running(s) || stream_idle(s)) {
return;
@@ -282,24 +283,26 @@ static void stream_process_mem2s(struct Stream *s,
StreamSlave *tx_data_dev,
}
if (stream_desc_sof(&s->desc)) {
- s->pos = 0;
stream_push(tx_control_dev, s->desc.app, sizeof(s->desc.app),
true);
}
txlen = s->desc.control & SDESC_CTRL_LEN_MASK;
- if ((txlen + s->pos) > sizeof s->txbuf) {
- hw_error("%s: too small internal txbuf! %d\n", __func__,
- txlen + s->pos);
- }
- address_space_read(&s->dma->as, s->desc.buffer_address,
- MEMTXATTRS_UNSPECIFIED,
- s->txbuf + s->pos, txlen);
- s->pos += txlen;
+ eop = stream_desc_eof(&s->desc);
+ addr = s->desc.buffer_address;
+ while (txlen) {
+ unsigned int len;
+
+ len = txlen > sizeof s->txbuf ? sizeof s->txbuf : txlen;
+ address_space_read(&s->dma->as, addr,
+ MEMTXATTRS_UNSPECIFIED,
+ s->txbuf, len);
+ stream_push(tx_data_dev, s->txbuf, len, eop && len == txlen);
+ txlen -= len;
+ addr += len;
+ }
- if (stream_desc_eof(&s->desc)) {
- stream_push(tx_data_dev, s->txbuf, s->pos, true);
- s->pos = 0;
+ if (eop) {
stream_complete(s);
}
--
2.20.1
- [PULL v1 00/14] Xilinx queue 2020-05-14, Edgar E. Iglesias, 2020/05/14
- [PULL v1 01/14] hw/net/xilinx_axienet: Auto-clear PHY Autoneg, Edgar E. Iglesias, 2020/05/14
- [PULL v1 02/14] hw/net/xilinx_axienet: Cleanup stream->push assignment, Edgar E. Iglesias, 2020/05/14
- [PULL v1 03/14] hw/net/xilinx_axienet: Remove unncessary cast, Edgar E. Iglesias, 2020/05/14
- [PULL v1 05/14] hw/core: stream: Add an end-of-packet flag, Edgar E. Iglesias, 2020/05/14
- [PULL v1 06/14] hw/net/xilinx_axienet: Handle fragmented packets from DMA, Edgar E. Iglesias, 2020/05/14
- [PULL v1 04/14] hw/dma/xilinx_axidma: Add DMA memory-region property, Edgar E. Iglesias, 2020/05/14
- [PULL v1 07/14] hw/dma/xilinx_axidma: mm2s: Stream descriptor by descriptor,
Edgar E. Iglesias <=
- [PULL v1 08/14] hw/dma/xilinx_axidma: s2mm: Support stream fragments, Edgar E. Iglesias, 2020/05/14
- [PULL v1 09/14] MAINTAINERS: Add myself as streams maintainer, Edgar E. Iglesias, 2020/05/14
- [PULL v1 10/14] target/microblaze: Add MFS Rd,EDR translation, Edgar E. Iglesias, 2020/05/14
- [PULL v1 11/14] target/microblaze: Fix FPU2 instruction check, Edgar E. Iglesias, 2020/05/14
- [PULL v1 12/14] target/microblaze: gdb: Extend the number of registers presented to GDB, Edgar E. Iglesias, 2020/05/14
- [PULL v1 13/14] target/microblaze: gdb: Fix incorrect SReg reporting, Edgar E. Iglesias, 2020/05/14
- [PULL v1 14/14] target/microblaze: monitor: Increase the number of registers reported, Edgar E. Iglesias, 2020/05/14
- Re: [PULL v1 00/14] Xilinx queue 2020-05-14, Peter Maydell, 2020/05/14