[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[PULL v1 14/14] target/microblaze: monitor: Increase the number of regis
From: |
Edgar E. Iglesias |
Subject: |
[PULL v1 14/14] target/microblaze: monitor: Increase the number of registers reported |
Date: |
Thu, 14 May 2020 16:14:02 +0200 |
From: Joe Komlodi <address@hidden>
Increase the number of registers reported to match GDB.
Registers that aren't modeled are reported as 0.
Signed-off-by: Joe Komlodi <address@hidden>
Reviewed-by: Edgar E. Iglesias <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: Edgar E. Iglesias <address@hidden>
---
target/microblaze/translate.c | 16 ++++++++++++++--
1 file changed, 14 insertions(+), 2 deletions(-)
diff --git a/target/microblaze/translate.c b/target/microblaze/translate.c
index 8079724f32..f6ff2591c3 100644
--- a/target/microblaze/translate.c
+++ b/target/microblaze/translate.c
@@ -1789,9 +1789,11 @@ void mb_cpu_dump_state(CPUState *cs, FILE *f, int flags)
qemu_fprintf(f, "IN: PC=%" PRIx64 " %s\n",
env->sregs[SR_PC], lookup_symbol(env->sregs[SR_PC]));
qemu_fprintf(f, "rmsr=%" PRIx64 " resr=%" PRIx64 " rear=%" PRIx64 " "
- "debug=%x imm=%x iflags=%x fsr=%" PRIx64 "\n",
+ "debug=%x imm=%x iflags=%x fsr=%" PRIx64 " "
+ "rbtr=%" PRIx64 "\n",
env->sregs[SR_MSR], env->sregs[SR_ESR], env->sregs[SR_EAR],
- env->debug, env->imm, env->iflags, env->sregs[SR_FSR]);
+ env->debug, env->imm, env->iflags, env->sregs[SR_FSR],
+ env->sregs[SR_BTR]);
qemu_fprintf(f, "btaken=%d btarget=%" PRIx64 " mode=%s(saved=%s) "
"eip=%d ie=%d\n",
env->btaken, env->btarget,
@@ -1799,7 +1801,17 @@ void mb_cpu_dump_state(CPUState *cs, FILE *f, int flags)
(env->sregs[SR_MSR] & MSR_UMS) ? "user" : "kernel",
(bool)(env->sregs[SR_MSR] & MSR_EIP),
(bool)(env->sregs[SR_MSR] & MSR_IE));
+ for (i = 0; i < 12; i++) {
+ qemu_fprintf(f, "rpvr%2.2d=%8.8x ", i, env->pvr.regs[i]);
+ if ((i + 1) % 4 == 0) {
+ qemu_fprintf(f, "\n");
+ }
+ }
+ /* Registers that aren't modeled are reported as 0 */
+ qemu_fprintf(f, "redr=%" PRIx64 " rpid=0 rzpr=0 rtlbx=0 rtlbsx=0 "
+ "rtlblo=0 rtlbhi=0\n", env->sregs[SR_EDR]);
+ qemu_fprintf(f, "slr=%x shr=%x\n", env->slr, env->shr);
for (i = 0; i < 32; i++) {
qemu_fprintf(f, "r%2.2d=%8.8x ", i, env->regs[i]);
if ((i + 1) % 4 == 0)
--
2.20.1
- [PULL v1 05/14] hw/core: stream: Add an end-of-packet flag, (continued)
- [PULL v1 05/14] hw/core: stream: Add an end-of-packet flag, Edgar E. Iglesias, 2020/05/14
- [PULL v1 06/14] hw/net/xilinx_axienet: Handle fragmented packets from DMA, Edgar E. Iglesias, 2020/05/14
- [PULL v1 04/14] hw/dma/xilinx_axidma: Add DMA memory-region property, Edgar E. Iglesias, 2020/05/14
- [PULL v1 07/14] hw/dma/xilinx_axidma: mm2s: Stream descriptor by descriptor, Edgar E. Iglesias, 2020/05/14
- [PULL v1 08/14] hw/dma/xilinx_axidma: s2mm: Support stream fragments, Edgar E. Iglesias, 2020/05/14
- [PULL v1 09/14] MAINTAINERS: Add myself as streams maintainer, Edgar E. Iglesias, 2020/05/14
- [PULL v1 10/14] target/microblaze: Add MFS Rd,EDR translation, Edgar E. Iglesias, 2020/05/14
- [PULL v1 11/14] target/microblaze: Fix FPU2 instruction check, Edgar E. Iglesias, 2020/05/14
- [PULL v1 12/14] target/microblaze: gdb: Extend the number of registers presented to GDB, Edgar E. Iglesias, 2020/05/14
- [PULL v1 13/14] target/microblaze: gdb: Fix incorrect SReg reporting, Edgar E. Iglesias, 2020/05/14
- [PULL v1 14/14] target/microblaze: monitor: Increase the number of registers reported,
Edgar E. Iglesias <=
- Re: [PULL v1 00/14] Xilinx queue 2020-05-14, Peter Maydell, 2020/05/14