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[PULL v1 02/14] hw/net/xilinx_axienet: Cleanup stream->push assignment
From: |
Edgar E. Iglesias |
Subject: |
[PULL v1 02/14] hw/net/xilinx_axienet: Cleanup stream->push assignment |
Date: |
Thu, 14 May 2020 16:13:50 +0200 |
From: "Edgar E. Iglesias" <address@hidden>
Split the shared stream_class_init function to assign
stream->push with better type-safety.
Reviewed-by: Alistair Francis <address@hidden>
Reviewed-by: Francisco Iglesias <address@hidden>
Signed-off-by: Edgar E. Iglesias <address@hidden>
Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
Message-Id: <address@hidden>
---
hw/net/xilinx_axienet.c | 18 ++++++++++++------
1 file changed, 12 insertions(+), 6 deletions(-)
diff --git a/hw/net/xilinx_axienet.c b/hw/net/xilinx_axienet.c
index 0f97510d8a..84073753d7 100644
--- a/hw/net/xilinx_axienet.c
+++ b/hw/net/xilinx_axienet.c
@@ -1029,11 +1029,19 @@ static void xilinx_enet_class_init(ObjectClass *klass,
void *data)
dc->reset = xilinx_axienet_reset;
}
-static void xilinx_enet_stream_class_init(ObjectClass *klass, void *data)
+static void xilinx_enet_control_stream_class_init(ObjectClass *klass,
+ void *data)
{
StreamSlaveClass *ssc = STREAM_SLAVE_CLASS(klass);
- ssc->push = data;
+ ssc->push = xilinx_axienet_control_stream_push;
+}
+
+static void xilinx_enet_data_stream_class_init(ObjectClass *klass, void *data)
+{
+ StreamSlaveClass *ssc = STREAM_SLAVE_CLASS(klass);
+
+ ssc->push = xilinx_axienet_data_stream_push;
}
static const TypeInfo xilinx_enet_info = {
@@ -1048,8 +1056,7 @@ static const TypeInfo xilinx_enet_data_stream_info = {
.name = TYPE_XILINX_AXI_ENET_DATA_STREAM,
.parent = TYPE_OBJECT,
.instance_size = sizeof(struct XilinxAXIEnetStreamSlave),
- .class_init = xilinx_enet_stream_class_init,
- .class_data = xilinx_axienet_data_stream_push,
+ .class_init = xilinx_enet_data_stream_class_init,
.interfaces = (InterfaceInfo[]) {
{ TYPE_STREAM_SLAVE },
{ }
@@ -1060,8 +1067,7 @@ static const TypeInfo xilinx_enet_control_stream_info = {
.name = TYPE_XILINX_AXI_ENET_CONTROL_STREAM,
.parent = TYPE_OBJECT,
.instance_size = sizeof(struct XilinxAXIEnetStreamSlave),
- .class_init = xilinx_enet_stream_class_init,
- .class_data = xilinx_axienet_control_stream_push,
+ .class_init = xilinx_enet_control_stream_class_init,
.interfaces = (InterfaceInfo[]) {
{ TYPE_STREAM_SLAVE },
{ }
--
2.20.1
- [PULL v1 00/14] Xilinx queue 2020-05-14, Edgar E. Iglesias, 2020/05/14
- [PULL v1 01/14] hw/net/xilinx_axienet: Auto-clear PHY Autoneg, Edgar E. Iglesias, 2020/05/14
- [PULL v1 02/14] hw/net/xilinx_axienet: Cleanup stream->push assignment,
Edgar E. Iglesias <=
- [PULL v1 03/14] hw/net/xilinx_axienet: Remove unncessary cast, Edgar E. Iglesias, 2020/05/14
- [PULL v1 05/14] hw/core: stream: Add an end-of-packet flag, Edgar E. Iglesias, 2020/05/14
- [PULL v1 06/14] hw/net/xilinx_axienet: Handle fragmented packets from DMA, Edgar E. Iglesias, 2020/05/14
- [PULL v1 04/14] hw/dma/xilinx_axidma: Add DMA memory-region property, Edgar E. Iglesias, 2020/05/14
- [PULL v1 07/14] hw/dma/xilinx_axidma: mm2s: Stream descriptor by descriptor, Edgar E. Iglesias, 2020/05/14
- [PULL v1 08/14] hw/dma/xilinx_axidma: s2mm: Support stream fragments, Edgar E. Iglesias, 2020/05/14
- [PULL v1 09/14] MAINTAINERS: Add myself as streams maintainer, Edgar E. Iglesias, 2020/05/14
- [PULL v1 10/14] target/microblaze: Add MFS Rd,EDR translation, Edgar E. Iglesias, 2020/05/14
- [PULL v1 11/14] target/microblaze: Fix FPU2 instruction check, Edgar E. Iglesias, 2020/05/14
- [PULL v1 12/14] target/microblaze: gdb: Extend the number of registers presented to GDB, Edgar E. Iglesias, 2020/05/14