[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
Re: [PATCH 37/71] target/arm: Add cpu properties for SME
From: |
Peter Maydell |
Subject: |
Re: [PATCH 37/71] target/arm: Add cpu properties for SME |
Date: |
Tue, 7 Jun 2022 10:47:07 +0100 |
On Thu, 2 Jun 2022 at 23:33, Richard Henderson
<richard.henderson@linaro.org> wrote:
>
> Mirror the properties for SVE. The main difference is
> that any arbitrary set of powers of 2 may be supported,
> and not the stricter constraints that apply to SVE.
>
> Include a property to control FEAT_SME_FA64, as failing
> to restrict the runtime to the proper subset of insns
> could be a major point for bugs.
>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> @@ -589,10 +589,13 @@ static void cpu_arm_get_vq(Object *obj, Visitor *v,
> const char *name,
> ARMCPU *cpu = ARM_CPU(obj);
> ARMVQMap *vq_map = opaque;
> uint32_t vq = atoi(&name[3]) / 128;
> + bool sve = vq_map == &cpu->sve_vq;
> bool value;
>
> - /* All vector lengths are disabled when SVE is off. */
> - if (!cpu_isar_feature(aa64_sve, cpu)) {
> + /* All vector lengths are disabled when feature is off. */
> + if (sve
> + ? !cpu_isar_feature(aa64_sve, cpu)
> + : !cpu_isar_feature(aa64_sme, cpu)) {
> value = false;
> } else {
> value = extract32(vq_map->map, vq - 1, 1);
I was wondering what you were going to do about this bit; the
comparison against &cpu->sve_vq feels a bit awkward but I guess
it's the simplest thing.
> +void arm_cpu_sme_finalize(ARMCPU *cpu, Error **errp)
> +{
> + uint32_t vq_map = cpu->sme_vq.map;
> + uint32_t vq_init = cpu->sme_vq.init;
> + uint32_t vq_supported = cpu->sme_vq.supported;
> + uint32_t vq;
> +
> + if (vq_map == 0) {
> + if (!cpu_isar_feature(aa64_sme, cpu)) {
> + cpu->isar.id_aa64smfr0 = 0;
> + return;
> + }
> +
> + /* TODO: KVM will require limitations via SMCR_EL2. */
> + vq_map = vq_supported & ~vq_init;
Do we currently forbid setting these properties entirely for KVM
(or just not provide them) ?
> +static void aarch64_add_sme_properties(Object *obj)
> +{
> + ARMCPU *cpu = ARM_CPU(obj);
> + uint32_t vq;
> +
> + object_property_add_bool(obj, "sme", cpu_arm_get_sme, cpu_arm_set_sme);
> + object_property_add_bool(obj, "sme_fa64", cpu_arm_get_sme_fa64,
> + cpu_arm_set_sme_fa64);
> +
> + for (vq = 1; vq <= ARM_MAX_VQ; vq <<= 1) {
> + char name[8];
> + sprintf(name, "sme%d", vq * 128);
> + object_property_add(obj, name, "bool", cpu_arm_get_vq,
> + cpu_arm_set_vq, NULL, &cpu->sme_vq);
> + }
> +
> +#ifdef CONFIG_USER_ONLY
> + /* Mirror linux /proc/sys/abi/sme_default_vector_length. */
> + object_property_add(obj, "sme-default-vector-length", "int32",
> + cpu_arm_get_default_vec_len,
> + cpu_arm_set_default_vec_len, NULL,
> + &cpu->sme_default_vq);
> +#endif
> +}
These new properties should be documented in
docs/system/arm/cpu-features.rst, similar to the SVE ones.
thanks
-- PMM
- [PATCH 34/71] target/arm: Generalize cpu_arm_{get, set}_default_vec_len, (continued)
- [PATCH 34/71] target/arm: Generalize cpu_arm_{get, set}_default_vec_len, Richard Henderson, 2022/06/02
- [PATCH 39/71] target/arm: Add SVL to TB flags, Richard Henderson, 2022/06/02
- [PATCH 26/71] target/arm: Add SMCR_ELx, Richard Henderson, 2022/06/02
- [PATCH 38/71] target/arm: Introduce sve_vqm1_for_el_sm, Richard Henderson, 2022/06/02
- [PATCH 37/71] target/arm: Add cpu properties for SME, Richard Henderson, 2022/06/02
- Re: [PATCH 37/71] target/arm: Add cpu properties for SME,
Peter Maydell <=
- [PATCH 40/71] target/arm: Move pred_{full, gvec}_reg_{offset, size} to translate-a64.h, Richard Henderson, 2022/06/02
- [PATCH 42/71] target/arm: Trap AdvSIMD usage when Streaming SVE is active, Richard Henderson, 2022/06/02
- [PATCH 41/71] target/arm: Add infrastructure for disas_sme, Richard Henderson, 2022/06/02
- [PATCH 43/71] target/arm: Implement SME RDSVL, ADDSVL, ADDSPL, Richard Henderson, 2022/06/02
- [PATCH 45/71] target/arm: Implement SME MOVA, Richard Henderson, 2022/06/02
- [PATCH 44/71] target/arm: Implement SME ZERO, Richard Henderson, 2022/06/02