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[task #15838] Submission of Freely Programmable Computer


From: Gary Wong
Subject: [task #15838] Submission of Freely Programmable Computer
Date: Mon, 21 Dec 2020 17:57:09 -0500 (EST)
User-agent: Mozilla/5.0 (X11; Linux x86_64; rv:80.0) Gecko/20100101 Firefox/80.0

Follow-up Comment #2, task #15838 (project administration):

Hi Ineiev, and thank you for the review!

[comment #1 comment #1:]
> > * License: GNU General Public License v3 or later (Many of the component
definitions are licensed under the Creative Commons Attribution-ShareAlike 4.0
International License (CC BY-SA)+additional permissions, compatible with GNU
GPL 3+.)
> 
> If you use some license, you should add a copy of it to your tarball.

For clarification, those components are not my work.  I've added a file to the
tarball (hardware/COPYING.kicad) indicating which third party files are
incorporated, and the text of CC BY-SA 4.0 + the KiCad exception.

> All copyrightable files in your tarball should have valid copyright and
license notices <https://savannah.nongnu.org/maintenance/ValidNotices/>,
including graphical files (to say nothing of files like README.md).

OK.  I don't yet include any graphical files.  I've added the GNU
All-Permissive License notice to the bottom of the README.

> > The schematics and PCB layout files require KiCad to be useful in
practice: GNU GPL 3+, https://kicad.org/
> 
> As far as I understand, any decent distribution should include generated
output files for schematics (like PDF or PS) and layout (Gerber + Excellon),
which is sufficient to be useful in practice; the editor is needed when the
user wants to make changes.

Agreed.  Are you suggesting I include such output files?  I'm willing to add
them to release tarballs, but I prefer to avoid the maintenance burden of
including them under revision control.

> > The programmable logic was written with the intent of synthesis via Yosys
(ISC licence, http://bygone.clairexen.net/yosys/), nextpnr (ISC licence,
https://github.com/YosysHQ/nextpnr), and related tools...
> 
> Could you elaborate on FPGA toolchain, including software for programming
the EEPROM?

Certainly... while alternatives might be possible, I perform bitstream
generation with the ecppack utility from Project Trellis (ISC licence,
https://github.com/YosysHQ/prjtrellis), which is already a transitive
dependency (via nextpnr).  Then the configuration can be applied via JTAG
using (e.g.) OpenOCD (GNU GPL 2+, http://openocd.org).  I've added references
to those projects in the README.

> > Whether or not it is "software" depends more on the choice of technology
used to instantiate it.
> 
> For the purpose the GPLv3, it doesn't matter: it defines,
> 
> 
> “The Program” refers to any copyrightable work licensed under this
License.
> 

I agree completely.  I am certain the licensing is appropriate; I brought it
up only in case of doubts whether the project falls within the scope of what
Savannah is intended to host.

I've uploaded a new tarball:

    https://savannah.nongnu.org/submissions_uploads/fpc-iii.tar.gz

incorporating the revisions above.

Thanks!

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