[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[PATCH 12/26] target/s390x: Move masking of psw.addr to cpu_get_tb_cpu_s
From: |
Richard Henderson |
Subject: |
[PATCH 12/26] target/s390x: Move masking of psw.addr to cpu_get_tb_cpu_state |
Date: |
Wed, 5 Oct 2022 20:44:07 -0700 |
Masking after the fact in s390x_tr_init_disas_context
provides incorrect information to tb_lookup.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/s390x/cpu.h | 13 +++++++------
target/s390x/tcg/translate.c | 6 ------
2 files changed, 7 insertions(+), 12 deletions(-)
diff --git a/target/s390x/cpu.h b/target/s390x/cpu.h
index 7d6d01325b..b5c99bc694 100644
--- a/target/s390x/cpu.h
+++ b/target/s390x/cpu.h
@@ -379,17 +379,18 @@ static inline int cpu_mmu_index(CPUS390XState *env, bool
ifetch)
}
static inline void cpu_get_tb_cpu_state(CPUS390XState* env, target_ulong *pc,
- target_ulong *cs_base, uint32_t *flags)
+ target_ulong *cs_base, uint32_t
*pflags)
{
- *pc = env->psw.addr;
- *cs_base = env->ex_value;
- *flags = (env->psw.mask >> FLAG_MASK_PSW_SHIFT) & FLAG_MASK_PSW;
+ int flags = (env->psw.mask >> FLAG_MASK_PSW_SHIFT) & FLAG_MASK_PSW;
if (env->cregs[0] & CR0_AFP) {
- *flags |= FLAG_MASK_AFP;
+ flags |= FLAG_MASK_AFP;
}
if (env->cregs[0] & CR0_VECTOR) {
- *flags |= FLAG_MASK_VECTOR;
+ flags |= FLAG_MASK_VECTOR;
}
+ *pflags = flags;
+ *cs_base = env->ex_value;
+ *pc = (flags & FLAG_MASK_64 ? env->psw.addr : env->psw.addr & 0x7fffffff);
}
/* PER bits from control register 9 */
diff --git a/target/s390x/tcg/translate.c b/target/s390x/tcg/translate.c
index 67c86996e9..9ee8146b87 100644
--- a/target/s390x/tcg/translate.c
+++ b/target/s390x/tcg/translate.c
@@ -6485,12 +6485,6 @@ static void s390x_tr_init_disas_context(DisasContextBase
*dcbase, CPUState *cs)
{
DisasContext *dc = container_of(dcbase, DisasContext, base);
- /* 31-bit mode */
- if (!(dc->base.tb->flags & FLAG_MASK_64)) {
- dc->base.pc_first &= 0x7fffffff;
- dc->base.pc_next = dc->base.pc_first;
- }
-
dc->cc_op = CC_OP_DYNAMIC;
dc->ex_value = dc->base.tb->cs_base;
dc->exit_to_mainloop = (dc->base.tb->flags & FLAG_MASK_PER) ||
dc->ex_value;
--
2.34.1
- [PATCH 22/26] target/s390x: Pass original r2 register to BCR, (continued)
- [PATCH 22/26] target/s390x: Pass original r2 register to BCR, Richard Henderson, 2022/10/05
- [PATCH 17/26] target/s390x: Introduce help_goto_indirect, Richard Henderson, 2022/10/05
- [PATCH 20/26] target/s390x: Split per_breaking_event from per_branch_*, Richard Henderson, 2022/10/05
- [PATCH 09/26] target/s390x: Use gen_psw_addr_disp in save_link_info, Richard Henderson, 2022/10/05
- [PATCH 23/26] tcg: Pass TCGTempKind to tcg_temp_new_internal, Richard Henderson, 2022/10/05
- [PATCH 25/26] tcg: Introduce tcg_temp_is_normal_*, Richard Henderson, 2022/10/05
- [PATCH 05/26] target/s390x: Change help_goto_direct to work on displacements, Richard Henderson, 2022/10/05
- [PATCH 18/26] target/s390x: Split per_branch, Richard Henderson, 2022/10/05
- [PATCH 10/26] target/s390x: Use gen_psw_addr_disp in op_sam, Richard Henderson, 2022/10/05
- [PATCH 11/26] target/s390x: Use ilen instead in branches, Richard Henderson, 2022/10/05
- [PATCH 12/26] target/s390x: Move masking of psw.addr to cpu_get_tb_cpu_state,
Richard Henderson <=
- [PATCH 14/26] target/s390x: Don't set gbea for user-only, Richard Henderson, 2022/10/05
- [PATCH 21/26] target/s390x: Remove PER check from use_goto_tb, Richard Henderson, 2022/10/05
- [PATCH 16/26] target/s390x: Disable conditional branch-to-next for PER, Richard Henderson, 2022/10/05
- [PATCH 26/26] target/s390x: Enable TARGET_TB_PCREL, Richard Henderson, 2022/10/05
- [PATCH 13/26] target/s390x: Add disp argument to update_psw_addr, Richard Henderson, 2022/10/05
- [PATCH 15/26] target/s390x: Introduce per_enabled, Richard Henderson, 2022/10/05
- [PATCH 19/26] target/s390x: Simplify help_branch, Richard Henderson, 2022/10/05
- [PATCH 24/26] tcg: Introduce tcg_temp_ebb_new_*, Richard Henderson, 2022/10/05
- Re: [PATCH 00/26] target/s390x: pc-relative translation blocks, Richard Henderson, 2022/10/24