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[PATCH 22/26] target/s390x: Pass original r2 register to BCR
From: |
Richard Henderson |
Subject: |
[PATCH 22/26] target/s390x: Pass original r2 register to BCR |
Date: |
Wed, 5 Oct 2022 20:44:17 -0700 |
We do not modify any general-purpose registers in BCR,
which means that we may be able to avoid saving the
value across a branch.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/s390x/tcg/translate.c | 10 ++++++++++
target/s390x/tcg/insn-data.def | 2 +-
2 files changed, 11 insertions(+), 1 deletion(-)
diff --git a/target/s390x/tcg/translate.c b/target/s390x/tcg/translate.c
index e6c7c2a6ae..b27e34f712 100644
--- a/target/s390x/tcg/translate.c
+++ b/target/s390x/tcg/translate.c
@@ -5704,6 +5704,16 @@ static void in2_r2_nz(DisasContext *s, DisasOps *o)
}
#define SPEC_in2_r2_nz 0
+static void in2_r2_o_nz(DisasContext *s, DisasOps *o)
+{
+ int r2 = get_field(s, r2);
+ if (r2 != 0) {
+ o->in2 = regs[r2];
+ o->g_in2 = true;
+ }
+}
+#define SPEC_in2_r2_o_nz 0
+
static void in2_r2_8s(DisasContext *s, DisasOps *o)
{
o->in2 = tcg_temp_new_i64();
diff --git a/target/s390x/tcg/insn-data.def b/target/s390x/tcg/insn-data.def
index 6382ceabfc..79f9202ab2 100644
--- a/target/s390x/tcg/insn-data.def
+++ b/target/s390x/tcg/insn-data.def
@@ -121,7 +121,7 @@
/* BRANCH INDIRECT ON CONDITION */
C(0xe347, BIC, RXY_b, MIE2,0, m2_64w, 0, 0, bc, 0)
/* BRANCH ON CONDITION */
- C(0x0700, BCR, RR_b, Z, 0, r2_nz, 0, 0, bc, 0)
+ C(0x0700, BCR, RR_b, Z, 0, r2_o_nz, 0, 0, bc, 0)
C(0x4700, BC, RX_b, Z, 0, a2, 0, 0, bc, 0)
/* BRANCH RELATIVE ON CONDITION */
C(0xa704, BRC, RI_c, Z, 0, 0, 0, 0, bc, 0)
--
2.34.1
- [PATCH 00/26] target/s390x: pc-relative translation blocks, Richard Henderson, 2022/10/05
- [PATCH 03/26] target/s390x: Use tcg_constant_i32 for fpinst_extract_m34, Richard Henderson, 2022/10/05
- [PATCH 01/26] target/s390x: Use tcg_constant_* in local contexts, Richard Henderson, 2022/10/05
- [PATCH 02/26] target/s390x: Use tcg_constant_* for DisasCompare, Richard Henderson, 2022/10/05
- [PATCH 04/26] target/s390x: Use tcg_constant_* in translate_vx.c.inc, Richard Henderson, 2022/10/05
- [PATCH 07/26] target/s390x: Remove pc argument to pc_to_link_into, Richard Henderson, 2022/10/05
- [PATCH 06/26] target/s390x: Introduce gen_psw_addr_disp, Richard Henderson, 2022/10/05
- [PATCH 08/26] target/s390x: Use gen_psw_addr_disp in pc_to_link_info, Richard Henderson, 2022/10/05
- [PATCH 22/26] target/s390x: Pass original r2 register to BCR,
Richard Henderson <=
- [PATCH 17/26] target/s390x: Introduce help_goto_indirect, Richard Henderson, 2022/10/05
- [PATCH 20/26] target/s390x: Split per_breaking_event from per_branch_*, Richard Henderson, 2022/10/05
- [PATCH 09/26] target/s390x: Use gen_psw_addr_disp in save_link_info, Richard Henderson, 2022/10/05
- [PATCH 23/26] tcg: Pass TCGTempKind to tcg_temp_new_internal, Richard Henderson, 2022/10/05
- [PATCH 25/26] tcg: Introduce tcg_temp_is_normal_*, Richard Henderson, 2022/10/05
- [PATCH 05/26] target/s390x: Change help_goto_direct to work on displacements, Richard Henderson, 2022/10/05
- [PATCH 18/26] target/s390x: Split per_branch, Richard Henderson, 2022/10/05
- [PATCH 10/26] target/s390x: Use gen_psw_addr_disp in op_sam, Richard Henderson, 2022/10/05
- [PATCH 11/26] target/s390x: Use ilen instead in branches, Richard Henderson, 2022/10/05
- [PATCH 12/26] target/s390x: Move masking of psw.addr to cpu_get_tb_cpu_state, Richard Henderson, 2022/10/05