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[PULL 05/18] riscv: sifive_u: Add ethernet0 to the aliases node
From: |
Palmer Dabbelt |
Subject: |
[PULL 05/18] riscv: sifive_u: Add ethernet0 to the aliases node |
Date: |
Mon, 28 Oct 2019 08:48:49 -0700 |
From: Bin Meng <address@hidden>
U-Boot expects this alias to be in place in order to fix up the mac
address of the ethernet node.
This is to keep in sync with Linux kernel commit below:
https://patchwork.kernel.org/patch/11133033/
Signed-off-by: Bin Meng <address@hidden>
Reviewed-by: Alistair Francis <address@hidden>
Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
Signed-off-by: Palmer Dabbelt <address@hidden>
---
hw/riscv/sifive_u.c | 5 ++++-
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/hw/riscv/sifive_u.c b/hw/riscv/sifive_u.c
index 02dd76176e..1ac51e3632 100644
--- a/hw/riscv/sifive_u.c
+++ b/hw/riscv/sifive_u.c
@@ -270,6 +270,10 @@ static void create_fdt(SiFiveUState *s, const struct
MemmapEntry *memmap,
s->soc.gem.conf.macaddr.a, ETH_ALEN);
qemu_fdt_setprop_cell(fdt, nodename, "#address-cells", 1);
qemu_fdt_setprop_cell(fdt, nodename, "#size-cells", 0);
+
+ qemu_fdt_add_subnode(fdt, "/aliases");
+ qemu_fdt_setprop_string(fdt, "/aliases", "ethernet0", nodename);
+
g_free(nodename);
nodename = g_strdup_printf("/soc/ethernet@%lx/ethernet-phy@0",
@@ -297,7 +301,6 @@ static void create_fdt(SiFiveUState *s, const struct
MemmapEntry *memmap,
qemu_fdt_setprop_string(fdt, "/chosen", "bootargs", cmdline);
}
- qemu_fdt_add_subnode(fdt, "/aliases");
qemu_fdt_setprop_string(fdt, "/aliases", "serial0", nodename);
g_free(nodename);
--
2.21.0
- [PULL] RISC-V Patches for the 4.2 Soft Freeze, Part 2, Palmer Dabbelt, 2019/10/28
- [PULL 01/18] riscv: Skip checking CSR privilege level in debugger mode, Palmer Dabbelt, 2019/10/28
- [PULL 02/18] RISC-V: Handle bus errors in the page table walker, Palmer Dabbelt, 2019/10/28
- [PULL 03/18] RISC-V: Implement cpu_do_transaction_failed, Palmer Dabbelt, 2019/10/28
- [PULL 05/18] riscv: sifive_u: Add ethernet0 to the aliases node,
Palmer Dabbelt <=
- [PULL 06/18] linux-user/riscv: Propagate fault address, Palmer Dabbelt, 2019/10/28
- [PULL 04/18] riscv: hw: Drop "clock-frequency" property of cpu nodes, Palmer Dabbelt, 2019/10/28
- [PULL 07/18] riscv/sifive_u: Add L2-LIM cache memory, Palmer Dabbelt, 2019/10/28
- [PULL 08/18] riscv/sifive_u: Add QSPI memory region, Palmer Dabbelt, 2019/10/28
- [PULL 09/18] riscv/sifive_u: Manually define the machine, Palmer Dabbelt, 2019/10/28
- [PULL 11/18] riscv/virt: Manually define the machine, Palmer Dabbelt, 2019/10/28
- [PULL 10/18] riscv/sifive_u: Add the start-in-flash property, Palmer Dabbelt, 2019/10/28
- [PULL 12/18] riscv/virt: Add the PFlash CFI01 device, Palmer Dabbelt, 2019/10/28
- [PULL 13/18] riscv/virt: Jump to pflash if specified, Palmer Dabbelt, 2019/10/28
- [PULL 14/18] target/riscv: Tell gdbstub the correct number of CSRs, Palmer Dabbelt, 2019/10/28