[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
Re: [Qemu-riscv] [PULL] RISC-V Patches for the 4.1 Soft Freeze, Part 1
|
From: |
Peter Maydell |
|
Subject: |
Re: [Qemu-riscv] [PULL] RISC-V Patches for the 4.1 Soft Freeze, Part 1 |
|
Date: |
Tue, 28 May 2019 12:25:01 +0100 |
On Sun, 26 May 2019 at 02:10, Palmer Dabbelt <address@hidden> wrote:
>
> The following changes since commit a7b21f6762a2d6ec08106d8a7ccb11829914523f:
>
> Merge remote-tracking branch
> 'remotes/vivier2/tags/linux-user-for-4.1-pull-request' into staging
> (2019-05-24 12:47:49 +0100)
>
> are available in the Git repository at:
>
> git://github.com/palmer-dabbelt/qemu.git tags/riscv-for-master-4.1-sf0
>
> for you to fetch changes up to 1e0d985fa9136a563168a3da66f3d17820404ee2:
>
> target/riscv: Only flush TLB if SATP.ASID changes (2019-05-24 12:09:25
> -0700)
>
> ----------------------------------------------------------------
> RISC-V Patches for the 4.1 Soft Freeze, Part 1
Applied, thanks.
Please update the changelog at https://wiki.qemu.org/ChangeLog/4.1
for any user-visible changes.
PS: softfreeze isn't for another month or so.
-- PMM
- [Qemu-riscv] [PULL 01/29] SiFive RISC-V GPIO Device, (continued)
- [Qemu-riscv] [PULL 01/29] SiFive RISC-V GPIO Device, Palmer Dabbelt, 2019/05/25
- [Qemu-riscv] [PULL 12/29] target/riscv: Remove unused include of riscv_htif.h for virt board riscv, Palmer Dabbelt, 2019/05/25
- [Qemu-riscv] [PULL 10/29] target/riscv: Split gen_arith_imm into functional and temp, Palmer Dabbelt, 2019/05/25
- [Qemu-riscv] [PULL 07/29] target/riscv: Merge argument decode for RVC shifti, Palmer Dabbelt, 2019/05/25
- [Qemu-riscv] [PULL 05/29] target/riscv: Use --static-decode for decodetree, Palmer Dabbelt, 2019/05/25
- [Qemu-riscv] [PULL 06/29] target/riscv: Merge argument sets for insn32 and insn16, Palmer Dabbelt, 2019/05/25
- [Qemu-riscv] [PULL 04/29] target/riscv: Name the argument sets for all of insn32 formats, Palmer Dabbelt, 2019/05/25
- [Qemu-riscv] [PULL 03/29] RISC-V: fix single stepping over ret and other branching instructions, Palmer Dabbelt, 2019/05/25
- [Qemu-riscv] [PULL 02/29] target/riscv: Do not allow sfence.vma from user mode, Palmer Dabbelt, 2019/05/25
- Re: [Qemu-riscv] [PULL] RISC-V Patches for the 4.1 Soft Freeze, Part 1,
Peter Maydell <=