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[PATCH v4 06/11] Update PowerPC AT_HWCAP2 definition
From: |
Lijun Pan |
Subject: |
[PATCH v4 06/11] Update PowerPC AT_HWCAP2 definition |
Date: |
Wed, 1 Jul 2020 18:43:41 -0500 |
Add PPC2_FEATURE2_ARCH_3_10 to the PowerPC AT_HWCAP2 definitions.
Signed-off-by: Lijun Pan <ljp@linux.ibm.com>
---
v4: add missing changes, and split to 5/11, 6/11, 7/11
v3: use tcg_gen_gvec_mul()
v2: fix coding style
use Power ISA 3.1 flag
include/elf.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/include/elf.h b/include/elf.h
index 8fbfe60e09..1858b95acf 100644
--- a/include/elf.h
+++ b/include/elf.h
@@ -554,6 +554,7 @@ typedef struct {
#define PPC_FEATURE2_HTM_NOSC 0x01000000
#define PPC_FEATURE2_ARCH_3_00 0x00800000
#define PPC_FEATURE2_HAS_IEEE128 0x00400000
+#define PPC_FEATURE2_ARCH_3_10 0x00200000
/* Bits present in AT_HWCAP for Sparc. */
--
2.23.0
- [PATCH v4 02/11] target/ppc: Enable Power ISA 3.1, (continued)
- [PATCH v4 02/11] target/ppc: Enable Power ISA 3.1, Lijun Pan, 2020/07/01
- [PATCH v4 05/11] target/ppc: add vmulld instruction, Lijun Pan, 2020/07/01
- [PATCH v4 08/11] target/ppc: add vmulh{su}w instructions, Lijun Pan, 2020/07/01
- [PATCH v4 01/11] target/ppc: Introduce Power ISA 3.1 flag, Lijun Pan, 2020/07/01
- [PATCH v4 03/11] target/ppc: add byte-reverse br[dwh] instructions, Lijun Pan, 2020/07/01
- [PATCH v4 06/11] Update PowerPC AT_HWCAP2 definition,
Lijun Pan <=
[PATCH v4 09/11] fix the prototype of muls64/mulu64, Lijun Pan, 2020/07/01
[PATCH v4 07/11] target/ppc: add vmulld to INDEX_op_mul_vec case, Lijun Pan, 2020/07/01
Re: [PATCH v4 00/11] Add several Power ISA 3.1 32/64-bit vector instructions, David Gibson, 2020/07/05