Re: [PATCH v4 00/11] Add several Power ISA 3.1 32/64-bit vector instructions

[David Gibson]

On Wed, Jul 01, 2020 at 06:43:35PM -0500, Lijun Pan wrote:
> This patch series add several newly introduced 32/64-bit vector
> instructions in Power ISA 3.1. Power ISA 3.1 flag is introduced in
> this version. In v4 version, coding style issues are fixed, community
> reviews/suggestions are taken into consideration.

So, is the ISA 3.1 document available somewhere?

> 
> Lijun Pan (11):
>   target/ppc: Introduce Power ISA 3.1 flag
>   target/ppc: Enable Power ISA 3.1
>   target/ppc: add byte-reverse br[dwh] instructions
>   target/ppc: convert vmuluwm to tcg_gen_gvec_mul
>   target/ppc: add vmulld instruction
>   Update PowerPC AT_HWCAP2 definition
>   target/ppc: add vmulld to INDEX_op_mul_vec case
>   target/ppc: add vmulh{su}w instructions
>   fix the prototype of muls64/mulu64
>   target/ppc: add vmulh{su}d instructions
>   target/ppc: add vdiv{su}{wd} vmod{su}{wd} instructions
> 
>  include/elf.h                       |  1 +
>  include/qemu/host-utils.h           |  4 +-
>  target/ppc/cpu.h                    |  4 +-
>  target/ppc/helper.h                 | 13 ++++-
>  target/ppc/int_helper.c             | 75 ++++++++++++++++++++++++-----
>  target/ppc/translate.c              | 43 +++++++++++++++++
>  target/ppc/translate/vmx-impl.inc.c | 26 +++++++++-
>  target/ppc/translate/vmx-ops.inc.c  | 27 +++++++++--
>  target/ppc/translate_init.inc.c     |  2 +-
>  tcg/ppc/tcg-target.h                |  2 +
>  tcg/ppc/tcg-target.inc.c            | 12 ++++-
>  11 files changed, 184 insertions(+), 25 deletions(-)
> 

-- 
David Gibson                    | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au  | minimalist, thank you.  NOT _the_ _other_
                                | _way_ _around_!
http://www.ozlabs.org/~dgibson

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