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[PULL 19/49] hw/net/xilinx_ethlite: Rename 'mmio' MR as 'container'
From: |
Philippe Mathieu-Daudé |
Subject: |
[PULL 19/49] hw/net/xilinx_ethlite: Rename 'mmio' MR as 'container' |
Date: |
Sun, 12 Jan 2025 23:16:55 +0100 |
Having all its address range mapped by subregions,
s->mmio MemoryRegion effectively became a container.
Rename it as 'container' for clarity.
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@amd.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <20241112181044.92193-21-philmd@linaro.org>
---
hw/net/xilinx_ethlite.c | 16 ++++++++--------
1 file changed, 8 insertions(+), 8 deletions(-)
diff --git a/hw/net/xilinx_ethlite.c b/hw/net/xilinx_ethlite.c
index 758226a65dd..a7f6d1b368c 100644
--- a/hw/net/xilinx_ethlite.c
+++ b/hw/net/xilinx_ethlite.c
@@ -85,7 +85,7 @@ struct XlnxXpsEthLite
{
SysBusDevice parent_obj;
- MemoryRegion mmio;
+ MemoryRegion container;
qemu_irq irq;
NICState *nic;
NICConf conf;
@@ -300,7 +300,7 @@ static void xilinx_ethlite_realize(DeviceState *dev, Error
**errp)
{
XlnxXpsEthLite *s = XILINX_ETHLITE(dev);
- memory_region_init(&s->mmio, OBJECT(dev),
+ memory_region_init(&s->container, OBJECT(dev),
"xlnx.xps-ethernetlite", 0x2000);
object_initialize_child(OBJECT(dev), "ethlite.mdio", &s->mdio,
@@ -308,31 +308,31 @@ static void xilinx_ethlite_realize(DeviceState *dev,
Error **errp)
qdev_prop_set_string(DEVICE(&s->mdio), "name", "ethlite.mdio");
qdev_prop_set_uint64(DEVICE(&s->mdio), "size", 4 * 4);
sysbus_realize(SYS_BUS_DEVICE(&s->mdio), &error_fatal);
- memory_region_add_subregion(&s->mmio, A_MDIO_BASE,
+ memory_region_add_subregion(&s->container, A_MDIO_BASE,
sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->mdio),
0));
for (unsigned i = 0; i < 2; i++) {
memory_region_init_ram(&s->port[i].txbuf, OBJECT(dev),
i ? "ethlite.tx[1]buf" : "ethlite.tx[0]buf",
BUFSZ_MAX, &error_abort);
- memory_region_add_subregion(&s->mmio, 0x0800 * i, &s->port[i].txbuf);
+ memory_region_add_subregion(&s->container, 0x0800 * i,
&s->port[i].txbuf);
memory_region_init_io(&s->port[i].txio, OBJECT(dev),
ð_porttx_ops, s,
i ? "ethlite.tx[1]io" : "ethlite.tx[0]io",
4 * TX_MAX);
- memory_region_add_subregion(&s->mmio, i ? A_TX_BASE1 : A_TX_BASE0,
+ memory_region_add_subregion(&s->container, i ? A_TX_BASE1 : A_TX_BASE0,
&s->port[i].txio);
memory_region_init_ram(&s->port[i].rxbuf, OBJECT(dev),
i ? "ethlite.rx[1]buf" : "ethlite.rx[0]buf",
BUFSZ_MAX, &error_abort);
- memory_region_add_subregion(&s->mmio, 0x1000 + 0x0800 * i,
+ memory_region_add_subregion(&s->container, 0x1000 + 0x0800 * i,
&s->port[i].rxbuf);
memory_region_init_io(&s->port[i].rxio, OBJECT(dev),
ð_portrx_ops, s,
i ? "ethlite.rx[1]io" : "ethlite.rx[0]io",
4 * RX_MAX);
- memory_region_add_subregion(&s->mmio, i ? A_RX_BASE1 : A_RX_BASE0,
+ memory_region_add_subregion(&s->container, i ? A_RX_BASE1 : A_RX_BASE0,
&s->port[i].rxio);
}
@@ -348,7 +348,7 @@ static void xilinx_ethlite_init(Object *obj)
XlnxXpsEthLite *s = XILINX_ETHLITE(obj);
sysbus_init_irq(SYS_BUS_DEVICE(obj), &s->irq);
- sysbus_init_mmio(SYS_BUS_DEVICE(obj), &s->mmio);
+ sysbus_init_mmio(SYS_BUS_DEVICE(obj), &s->container);
}
static const Property xilinx_ethlite_properties[] = {
--
2.47.1
- [PULL 09/49] hw/net/xilinx_ethlite: Introduce txbuf_ptr() helper, (continued)
- [PULL 09/49] hw/net/xilinx_ethlite: Introduce txbuf_ptr() helper, Philippe Mathieu-Daudé, 2025/01/12
- [PULL 10/49] hw/net/xilinx_ethlite: Introduce rxbuf_ptr() helper, Philippe Mathieu-Daudé, 2025/01/12
- [PULL 11/49] hw/net/xilinx_ethlite: Access TX_GIE register for each port, Philippe Mathieu-Daudé, 2025/01/12
- [PULL 12/49] hw/net/xilinx_ethlite: Access TX_LEN register for each port, Philippe Mathieu-Daudé, 2025/01/12
- [PULL 13/49] hw/net/xilinx_ethlite: Access TX_CTRL register for each port, Philippe Mathieu-Daudé, 2025/01/12
- [PULL 14/49] hw/net/xilinx_ethlite: Map RX_CTRL as MMIO, Philippe Mathieu-Daudé, 2025/01/12
- [PULL 15/49] hw/net/xilinx_ethlite: Map TX_LEN as MMIO, Philippe Mathieu-Daudé, 2025/01/12
- [PULL 16/49] hw/net/xilinx_ethlite: Map TX_GIE as MMIO, Philippe Mathieu-Daudé, 2025/01/12
- [PULL 17/49] hw/net/xilinx_ethlite: Map TX_CTRL as MMIO, Philippe Mathieu-Daudé, 2025/01/12
- [PULL 18/49] hw/net/xilinx_ethlite: Map the RAM buffer as RAM memory region, Philippe Mathieu-Daudé, 2025/01/12
- [PULL 19/49] hw/net/xilinx_ethlite: Rename 'mmio' MR as 'container',
Philippe Mathieu-Daudé <=
- [PULL 20/49] hw/net/xilinx_ethlite: Map RESERVED I/O as unimplemented, Philippe Mathieu-Daudé, 2025/01/12
- [PULL 21/49] docs/nitro-enclave: Clarify Enclave and Firecracker relationship, Philippe Mathieu-Daudé, 2025/01/12
- [PULL 26/49] hw/sd/sdhci: Set SDHC_NIS_DMA bit when appropriate, Philippe Mathieu-Daudé, 2025/01/12
- [PULL 22/49] hw/misc/vmcoreinfo: Rename VMCOREINFO_DEVICE -> TYPE_VMCOREINFO, Philippe Mathieu-Daudé, 2025/01/12
- [PULL 23/49] hw/misc/vmcoreinfo: Convert to three-phase reset interface, Philippe Mathieu-Daudé, 2025/01/12
- [PULL 24/49] hw/pci: Rename has_power to enabled, Philippe Mathieu-Daudé, 2025/01/12
- [PULL 25/49] hw/ufs: Adjust value to match CPU's endian format, Philippe Mathieu-Daudé, 2025/01/12
- [PULL 27/49] hw/sd/sdhci: Factor sdhci_sdma_transfer() out, Philippe Mathieu-Daudé, 2025/01/12
- [PULL 28/49] hw/char/stm32f2xx_usart: replace print with trace, Philippe Mathieu-Daudé, 2025/01/12
- [PULL 29/49] hw/timer/imx_gpt: Remove unused define, Philippe Mathieu-Daudé, 2025/01/12