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[PULL 26/49] hw/sd/sdhci: Set SDHC_NIS_DMA bit when appropriate
From: |
Philippe Mathieu-Daudé |
Subject: |
[PULL 26/49] hw/sd/sdhci: Set SDHC_NIS_DMA bit when appropriate |
Date: |
Sun, 12 Jan 2025 23:17:02 +0100 |
From: Bernhard Beschow <shentey@gmail.com>
In U-Boot, the fsl_esdhc[_imx] driver waits for both "transmit completed" and
"DMA" bits in esdhc_send_cmd_common() by means of DATA_COMPLETE constant. QEMU
currently misses to set the DMA bit which causes the driver to loop forever. Fix
that by setting the DMA bit if enabled when doing DMA block transfers.
Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20250108092538.11474-2-shentey@gmail.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
hw/sd/sdhci.c | 11 ++++++++---
1 file changed, 8 insertions(+), 3 deletions(-)
diff --git a/hw/sd/sdhci.c b/hw/sd/sdhci.c
index 299cd4bc1b6..a958c114974 100644
--- a/hw/sd/sdhci.c
+++ b/hw/sd/sdhci.c
@@ -665,12 +665,13 @@ static void sdhci_sdma_transfer_multi_blocks(SDHCIState
*s)
}
}
+ if (s->norintstsen & SDHC_NISEN_DMA) {
+ s->norintsts |= SDHC_NIS_DMA;
+ }
+
if (s->blkcnt == 0) {
sdhci_end_transfer(s);
} else {
- if (s->norintstsen & SDHC_NISEN_DMA) {
- s->norintsts |= SDHC_NIS_DMA;
- }
sdhci_update_irq(s);
}
}
@@ -691,6 +692,10 @@ static void sdhci_sdma_transfer_single_block(SDHCIState *s)
}
s->blkcnt--;
+ if (s->norintstsen & SDHC_NISEN_DMA) {
+ s->norintsts |= SDHC_NIS_DMA;
+ }
+
sdhci_end_transfer(s);
}
--
2.47.1
- [PULL 12/49] hw/net/xilinx_ethlite: Access TX_LEN register for each port, (continued)
- [PULL 12/49] hw/net/xilinx_ethlite: Access TX_LEN register for each port, Philippe Mathieu-Daudé, 2025/01/12
- [PULL 13/49] hw/net/xilinx_ethlite: Access TX_CTRL register for each port, Philippe Mathieu-Daudé, 2025/01/12
- [PULL 14/49] hw/net/xilinx_ethlite: Map RX_CTRL as MMIO, Philippe Mathieu-Daudé, 2025/01/12
- [PULL 15/49] hw/net/xilinx_ethlite: Map TX_LEN as MMIO, Philippe Mathieu-Daudé, 2025/01/12
- [PULL 16/49] hw/net/xilinx_ethlite: Map TX_GIE as MMIO, Philippe Mathieu-Daudé, 2025/01/12
- [PULL 17/49] hw/net/xilinx_ethlite: Map TX_CTRL as MMIO, Philippe Mathieu-Daudé, 2025/01/12
- [PULL 18/49] hw/net/xilinx_ethlite: Map the RAM buffer as RAM memory region, Philippe Mathieu-Daudé, 2025/01/12
- [PULL 19/49] hw/net/xilinx_ethlite: Rename 'mmio' MR as 'container', Philippe Mathieu-Daudé, 2025/01/12
- [PULL 20/49] hw/net/xilinx_ethlite: Map RESERVED I/O as unimplemented, Philippe Mathieu-Daudé, 2025/01/12
- [PULL 21/49] docs/nitro-enclave: Clarify Enclave and Firecracker relationship, Philippe Mathieu-Daudé, 2025/01/12
- [PULL 26/49] hw/sd/sdhci: Set SDHC_NIS_DMA bit when appropriate,
Philippe Mathieu-Daudé <=
- [PULL 22/49] hw/misc/vmcoreinfo: Rename VMCOREINFO_DEVICE -> TYPE_VMCOREINFO, Philippe Mathieu-Daudé, 2025/01/12
- [PULL 23/49] hw/misc/vmcoreinfo: Convert to three-phase reset interface, Philippe Mathieu-Daudé, 2025/01/12
- [PULL 24/49] hw/pci: Rename has_power to enabled, Philippe Mathieu-Daudé, 2025/01/12
- [PULL 25/49] hw/ufs: Adjust value to match CPU's endian format, Philippe Mathieu-Daudé, 2025/01/12
- [PULL 27/49] hw/sd/sdhci: Factor sdhci_sdma_transfer() out, Philippe Mathieu-Daudé, 2025/01/12
- [PULL 28/49] hw/char/stm32f2xx_usart: replace print with trace, Philippe Mathieu-Daudé, 2025/01/12
- [PULL 29/49] hw/timer/imx_gpt: Remove unused define, Philippe Mathieu-Daudé, 2025/01/12
- [PULL 31/49] hw/misc/imx6_src: Convert DPRINTF() to trace events, Philippe Mathieu-Daudé, 2025/01/12
- [PULL 35/49] tests/qtest/boot-serial-test: Correct HPPA machine name, Philippe Mathieu-Daudé, 2025/01/12
- [PULL 33/49] hw/i2c/imx_i2c: Convert DPRINTF() to trace events, Philippe Mathieu-Daudé, 2025/01/12