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[PULL 21/49] docs/nitro-enclave: Clarify Enclave and Firecracker relatio
From: |
Philippe Mathieu-Daudé |
Subject: |
[PULL 21/49] docs/nitro-enclave: Clarify Enclave and Firecracker relationship |
Date: |
Sun, 12 Jan 2025 23:16:57 +0100 |
From: Alexander Graf <graf@amazon.com>
The documentation says that Nitro Enclaves are based on Firecracker.
AWS has never made that statement.
This patch nudges the wording to instead say it "looks like a
Firecracker microvm".
Signed-off-by: Alexander Graf <graf@amazon.com>
Reviewed-by: Dorjoy Chowdhury <dorjoychy111@gmail.com>
Message-ID: <20241211222512.95660-1-graf@amazon.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
docs/system/i386/nitro-enclave.rst | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/docs/system/i386/nitro-enclave.rst
b/docs/system/i386/nitro-enclave.rst
index 48eda5bd9ec..7317f547dce 100644
--- a/docs/system/i386/nitro-enclave.rst
+++ b/docs/system/i386/nitro-enclave.rst
@@ -13,7 +13,7 @@ the enclave VM gets a dynamic CID. Enclaves use an EIF
(`Enclave Image Format`_)
file which contains the necessary kernel, cmdline and ramdisk(s) to boot.
In QEMU, ``nitro-enclave`` is a machine type based on ``microvm`` similar to
how
-AWS nitro enclaves are based on `Firecracker`_ microvm. This is useful for
+AWS nitro enclaves look like a `Firecracker`_ microvm. This is useful for
local testing of EIF files using QEMU instead of running real AWS Nitro
Enclaves
which can be difficult for debugging due to its roots in security. The vsock
device emulation is done using vhost-user-vsock which means another process
that
--
2.47.1
- [PULL 11/49] hw/net/xilinx_ethlite: Access TX_GIE register for each port, (continued)
- [PULL 11/49] hw/net/xilinx_ethlite: Access TX_GIE register for each port, Philippe Mathieu-Daudé, 2025/01/12
- [PULL 12/49] hw/net/xilinx_ethlite: Access TX_LEN register for each port, Philippe Mathieu-Daudé, 2025/01/12
- [PULL 13/49] hw/net/xilinx_ethlite: Access TX_CTRL register for each port, Philippe Mathieu-Daudé, 2025/01/12
- [PULL 14/49] hw/net/xilinx_ethlite: Map RX_CTRL as MMIO, Philippe Mathieu-Daudé, 2025/01/12
- [PULL 15/49] hw/net/xilinx_ethlite: Map TX_LEN as MMIO, Philippe Mathieu-Daudé, 2025/01/12
- [PULL 16/49] hw/net/xilinx_ethlite: Map TX_GIE as MMIO, Philippe Mathieu-Daudé, 2025/01/12
- [PULL 17/49] hw/net/xilinx_ethlite: Map TX_CTRL as MMIO, Philippe Mathieu-Daudé, 2025/01/12
- [PULL 18/49] hw/net/xilinx_ethlite: Map the RAM buffer as RAM memory region, Philippe Mathieu-Daudé, 2025/01/12
- [PULL 19/49] hw/net/xilinx_ethlite: Rename 'mmio' MR as 'container', Philippe Mathieu-Daudé, 2025/01/12
- [PULL 20/49] hw/net/xilinx_ethlite: Map RESERVED I/O as unimplemented, Philippe Mathieu-Daudé, 2025/01/12
- [PULL 21/49] docs/nitro-enclave: Clarify Enclave and Firecracker relationship,
Philippe Mathieu-Daudé <=
- [PULL 26/49] hw/sd/sdhci: Set SDHC_NIS_DMA bit when appropriate, Philippe Mathieu-Daudé, 2025/01/12
- [PULL 22/49] hw/misc/vmcoreinfo: Rename VMCOREINFO_DEVICE -> TYPE_VMCOREINFO, Philippe Mathieu-Daudé, 2025/01/12
- [PULL 23/49] hw/misc/vmcoreinfo: Convert to three-phase reset interface, Philippe Mathieu-Daudé, 2025/01/12
- [PULL 24/49] hw/pci: Rename has_power to enabled, Philippe Mathieu-Daudé, 2025/01/12
- [PULL 25/49] hw/ufs: Adjust value to match CPU's endian format, Philippe Mathieu-Daudé, 2025/01/12
- [PULL 27/49] hw/sd/sdhci: Factor sdhci_sdma_transfer() out, Philippe Mathieu-Daudé, 2025/01/12
- [PULL 28/49] hw/char/stm32f2xx_usart: replace print with trace, Philippe Mathieu-Daudé, 2025/01/12
- [PULL 29/49] hw/timer/imx_gpt: Remove unused define, Philippe Mathieu-Daudé, 2025/01/12
- [PULL 31/49] hw/misc/imx6_src: Convert DPRINTF() to trace events, Philippe Mathieu-Daudé, 2025/01/12
- [PULL 35/49] tests/qtest/boot-serial-test: Correct HPPA machine name, Philippe Mathieu-Daudé, 2025/01/12