qemu-devel
[Top][All Lists]
Advanced

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

Re: [PATCH V2 1/1] target/loongarch: Fixed tlb huge page loading issue


From: Richard Henderson
Subject: Re: [PATCH V2 1/1] target/loongarch: Fixed tlb huge page loading issue
Date: Wed, 6 Mar 2024 07:46:20 -1000
User-agent: Mozilla Thunderbird

On 3/5/24 21:38, maobibo wrote:
Sorry, manual is updated already and we do not notice that still.

https://www.loongson.cn/uploads/images/2023102309132647981.%E9%BE%99%E8%8A%AF%E6%9E%B6%E6%9E%84%E5%8F%82%E8%80%83%E6%89%8B%E5%86%8C%E5%8D%B7%E4%B8%80_r1p10.pdf

It is Chinese web link, English manual is not updated. Here is English translation by manual with instruction  "lddir rd, rj, level"

If the bit[14:13] of the register rj is not equal to 0 and its bit[6] is 1, the value of the register rj is a marked as HugePage page entries. In this case, the value from register rj is written directly to register rd.

If the bit[14:13] of the register rj is equal to 0 and its bit[6] is 1, the value of the register rj is an Hugepage table entry. In this case, replace the bit[14:13] of the register RJ value with level[1:0], the val is written to the register rd.

If the bit[6] bit of register rj is 0, the value of the universal register rj is the page table entry, it is  physical address base page table. In this case, if the LDDIR command is executed, the address will be refilled according to the TLB currently processed. Retrieve the base address of the next-level page table and write it to the common register rd.

We will remove temporary lddir_ps, and record page size with bit[14:13] in next 
version.

Excellent, thank you for that translation.


r~



reply via email to

[Prev in Thread] Current Thread [Next in Thread]