[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[PULL 29/44] hw/mips/cps: Do not allow use without input clock
From: |
Philippe Mathieu-Daudé |
Subject: |
[PULL 29/44] hw/mips/cps: Do not allow use without input clock |
Date: |
Sat, 17 Oct 2020 16:02:28 +0200 |
Now than all QOM users provides the input clock, do not allow
using a CPS without input clock connected.
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20201012095804.3335117-21-f4bug@amsat.org>
---
hw/mips/cps.c | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/hw/mips/cps.c b/hw/mips/cps.c
index af7b58c4bdd..c624821315a 100644
--- a/hw/mips/cps.c
+++ b/hw/mips/cps.c
@@ -74,6 +74,11 @@ static void mips_cps_realize(DeviceState *dev, Error **errp)
bool itu_present = false;
bool saar_present = false;
+ if (!clock_get(s->clock)) {
+ error_setg(errp, "CPS input clock is not connected to an output
clock");
+ return;
+ }
+
for (i = 0; i < s->num_vp; i++) {
cpu = MIPS_CPU(object_new(s->cpu_type));
--
2.26.2
- [PULL 19/44] target/mips/cpu: Make cp0_count_rate a property, (continued)
- [PULL 19/44] target/mips/cpu: Make cp0_count_rate a property, Philippe Mathieu-Daudé, 2020/10/17
- [PULL 20/44] target/mips/cpu: Allow the CPU to use dynamic frequencies, Philippe Mathieu-Daudé, 2020/10/17
- [PULL 21/44] target/mips/cpu: Introduce mips_cpu_create_with_clock() helper, Philippe Mathieu-Daudé, 2020/10/17
- [PULL 22/44] hw/mips/r4k: Explicit CPU frequency is 200 MHz, Philippe Mathieu-Daudé, 2020/10/17
- [PULL 23/44] hw/mips/fuloong2e: Set CPU frequency to 533 MHz, Philippe Mathieu-Daudé, 2020/10/17
- [PULL 24/44] hw/mips/mipssim: Correct CPU frequency, Philippe Mathieu-Daudé, 2020/10/17
- [PULL 25/44] hw/mips/jazz: Correct CPU frequencies, Philippe Mathieu-Daudé, 2020/10/17
- [PULL 26/44] hw/mips/cps: Expose input clock and connect it to CPU cores, Philippe Mathieu-Daudé, 2020/10/17
- [PULL 27/44] hw/mips/boston: Set CPU frequency to 1 GHz, Philippe Mathieu-Daudé, 2020/10/17
- [PULL 28/44] hw/mips/malta: Set CPU frequency to 320 MHz, Philippe Mathieu-Daudé, 2020/10/17
- [PULL 29/44] hw/mips/cps: Do not allow use without input clock,
Philippe Mathieu-Daudé <=
- [PULL 30/44] target/mips/cpu: Display warning when CPU is used without input clock, Philippe Mathieu-Daudé, 2020/10/17
- [PULL 31/44] hw/mips/malta: Fix FPGA I/O region size, Philippe Mathieu-Daudé, 2020/10/17
- [PULL 32/44] hw/mips/malta: Move gt64120 related code together, Philippe Mathieu-Daudé, 2020/10/17
- [PULL 33/44] hw/mips/malta: Use clearer qdev style, Philippe Mathieu-Daudé, 2020/10/17
- [PULL 34/44] hw/mips: Simplify loading 64-bit ELF kernels, Philippe Mathieu-Daudé, 2020/10/17
- [PULL 35/44] hw/mips: Simplify code using ROUND_UP(INITRD_PAGE_SIZE), Philippe Mathieu-Daudé, 2020/10/17
- [PULL 36/44] hw/mips: Rename TYPE_MIPS_BOSTON to TYPE_BOSTON, Philippe Mathieu-Daudé, 2020/10/17
- [PULL 37/44] hw/mips: Remove exit(1) in case of missing ROM, Philippe Mathieu-Daudé, 2020/10/17
- [PULL 38/44] tests/acceptance: Add MIPS record/replay tests, Philippe Mathieu-Daudé, 2020/10/17
- [PULL 39/44] docs/system: Update MIPS CPU documentation, Philippe Mathieu-Daudé, 2020/10/17