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[PULL 34/44] hw/mips: Simplify loading 64-bit ELF kernels
From: |
Philippe Mathieu-Daudé |
Subject: |
[PULL 34/44] hw/mips: Simplify loading 64-bit ELF kernels |
Date: |
Sat, 17 Oct 2020 16:02:33 +0200 |
Since 82790064116 ("Cast ELF datatypes properly to host 64bit types")
we don't need to sign-extend the entry_point address. Remove this
unnecessary code.
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20200927163943.614604-2-f4bug@amsat.org>
---
hw/mips/mipssim.c | 6 +-----
hw/mips/r4k.c | 6 +-----
2 files changed, 2 insertions(+), 10 deletions(-)
diff --git a/hw/mips/mipssim.c b/hw/mips/mipssim.c
index f0042f7f436..afef4f2e77a 100644
--- a/hw/mips/mipssim.c
+++ b/hw/mips/mipssim.c
@@ -77,11 +77,7 @@ static int64_t load_kernel(void)
(uint64_t *)&entry, NULL,
(uint64_t *)&kernel_high, NULL, big_endian,
EM_MIPS, 1, 0);
- if (kernel_size >= 0) {
- if ((entry & ~0x7fffffffULL) == 0x80000000) {
- entry = (int32_t)entry;
- }
- } else {
+ if (kernel_size < 0) {
error_report("could not load kernel '%s': %s",
loaderparams.kernel_filename,
load_elf_strerror(kernel_size));
diff --git a/hw/mips/r4k.c b/hw/mips/r4k.c
index 39bc626e7c5..7ee37c49689 100644
--- a/hw/mips/r4k.c
+++ b/hw/mips/r4k.c
@@ -102,11 +102,7 @@ static int64_t load_kernel(void)
(uint64_t *)&entry, NULL,
(uint64_t *)&kernel_high, NULL, big_endian,
EM_MIPS, 1, 0);
- if (kernel_size >= 0) {
- if ((entry & ~0x7fffffffULL) == 0x80000000) {
- entry = (int32_t)entry;
- }
- } else {
+ if (kernel_size < 0) {
error_report("could not load kernel '%s': %s",
loaderparams.kernel_filename,
load_elf_strerror(kernel_size));
--
2.26.2
- [PULL 24/44] hw/mips/mipssim: Correct CPU frequency, (continued)
- [PULL 24/44] hw/mips/mipssim: Correct CPU frequency, Philippe Mathieu-Daudé, 2020/10/17
- [PULL 25/44] hw/mips/jazz: Correct CPU frequencies, Philippe Mathieu-Daudé, 2020/10/17
- [PULL 26/44] hw/mips/cps: Expose input clock and connect it to CPU cores, Philippe Mathieu-Daudé, 2020/10/17
- [PULL 27/44] hw/mips/boston: Set CPU frequency to 1 GHz, Philippe Mathieu-Daudé, 2020/10/17
- [PULL 28/44] hw/mips/malta: Set CPU frequency to 320 MHz, Philippe Mathieu-Daudé, 2020/10/17
- [PULL 29/44] hw/mips/cps: Do not allow use without input clock, Philippe Mathieu-Daudé, 2020/10/17
- [PULL 30/44] target/mips/cpu: Display warning when CPU is used without input clock, Philippe Mathieu-Daudé, 2020/10/17
- [PULL 31/44] hw/mips/malta: Fix FPGA I/O region size, Philippe Mathieu-Daudé, 2020/10/17
- [PULL 32/44] hw/mips/malta: Move gt64120 related code together, Philippe Mathieu-Daudé, 2020/10/17
- [PULL 33/44] hw/mips/malta: Use clearer qdev style, Philippe Mathieu-Daudé, 2020/10/17
- [PULL 34/44] hw/mips: Simplify loading 64-bit ELF kernels,
Philippe Mathieu-Daudé <=
- [PULL 35/44] hw/mips: Simplify code using ROUND_UP(INITRD_PAGE_SIZE), Philippe Mathieu-Daudé, 2020/10/17
- [PULL 36/44] hw/mips: Rename TYPE_MIPS_BOSTON to TYPE_BOSTON, Philippe Mathieu-Daudé, 2020/10/17
- [PULL 37/44] hw/mips: Remove exit(1) in case of missing ROM, Philippe Mathieu-Daudé, 2020/10/17
- [PULL 38/44] tests/acceptance: Add MIPS record/replay tests, Philippe Mathieu-Daudé, 2020/10/17
- [PULL 39/44] docs/system: Update MIPS CPU documentation, Philippe Mathieu-Daudé, 2020/10/17
- [PULL 40/44] MAINTAINERS: Remove myself, Philippe Mathieu-Daudé, 2020/10/17
- [PULL 41/44] MAINTAINERS: Put myself forward for MIPS target, Philippe Mathieu-Daudé, 2020/10/17
- [PULL 42/44] MAINTAINERS: Downgrade MIPS Boston to 'Odd Fixes', fix Paul Burton mail, Philippe Mathieu-Daudé, 2020/10/17
- [PULL 43/44] MAINTAINERS: Remove duplicated Malta test entries, Philippe Mathieu-Daudé, 2020/10/17
- [PULL 44/44] target/mips: Increase number of TLB entries on the 34Kf core (16 -> 64), Philippe Mathieu-Daudé, 2020/10/17