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[PULL 00/18] target-arm queue
From: |
Peter Maydell |
Subject: |
[PULL 00/18] target-arm queue |
Date: |
Thu, 1 Oct 2020 15:47:41 +0100 |
Nothing very exciting this time around...
-- PMM
The following changes since commit 37a712a0f969ca2df7f01182409a6c4825cebfb5:
Merge remote-tracking branch 'remotes/bonzini-gitlab/tags/for-upstream' into
staging (2020-10-01 12:23:19 +0100)
are available in the Git repository at:
https://git.linaro.org/people/pmaydell/qemu-arm.git
tags/pull-target-arm-20201001
for you to fetch changes up to cdfaa57dcb53ba012439765a1462247dfda8595d:
hw/arm/raspi: Remove use of the 'version' value in the board code (2020-10-01
15:31:01 +0100)
----------------------------------------------------------------
target-arm queue:
* Make isar_feature_aa32_fp16_arith() handle M-profile
* Fix SVE splice
* Fix SVE LDR/STR
* Remove ignore_memory_transaction_failures on the raspi2
* raspi: Various cleanup/refactoring
----------------------------------------------------------------
Peter Maydell (5):
target/arm: Replace ARM_FEATURE_PXN with ID_MMFR0.VMSA check
target/arm: Move id_pfr0, id_pfr1 into ARMISARegisters
hw/intc/armv7m_nvic: Only show ID register values for Main Extension CPUs
target/arm: Add ID register values for Cortex-M0
target/arm: Make isar_feature_aa32_fp16_arith() handle M-profile
Philippe Mathieu-Daudé (11):
hw/arm/raspi: Define various blocks base addresses
hw/arm/bcm2835: Add more unimplemented peripherals
hw/arm/raspi: Remove ignore_memory_transaction_failures on the raspi2
hw/arm/raspi: Display the board revision in the machine description
hw/arm/raspi: Load the firmware on the first core
hw/arm/raspi: Move arm_boot_info structure to RaspiMachineState
hw/arm/raspi: Avoid using TypeInfo::class_data pointer
hw/arm/raspi: Use more specific machine names
hw/arm/raspi: Introduce RaspiProcessorId enum
hw/arm/raspi: Use RaspiProcessorId to set the firmware load address
hw/arm/raspi: Remove use of the 'version' value in the board code
Richard Henderson (2):
target/arm: Fix sve ldr/str
target/arm: Fix SVE splice
include/hw/arm/bcm2835_peripherals.h | 2 +
include/hw/arm/raspi_platform.h | 51 ++++++++++--
target/arm/cpu.h | 50 +++++++++--
hw/arm/bcm2835_peripherals.c | 2 +
hw/arm/raspi.c | 155 +++++++++++++++++++----------------
hw/intc/armv7m_nvic.c | 46 ++++++++++-
target/arm/cpu.c | 21 +++--
target/arm/cpu64.c | 12 +--
target/arm/cpu_tcg.c | 60 ++++++++++----
target/arm/helper.c | 9 +-
target/arm/kvm64.c | 4 +
target/arm/translate-sve.c | 6 +-
12 files changed, 286 insertions(+), 132 deletions(-)
- [PULL 00/18] target-arm queue,
Peter Maydell <=
- [PULL 01/18] target/arm: Replace ARM_FEATURE_PXN with ID_MMFR0.VMSA check, Peter Maydell, 2020/10/01
- [PULL 02/18] target/arm: Move id_pfr0, id_pfr1 into ARMISARegisters, Peter Maydell, 2020/10/01
- [PULL 04/18] target/arm: Add ID register values for Cortex-M0, Peter Maydell, 2020/10/01
- [PULL 03/18] hw/intc/armv7m_nvic: Only show ID register values for Main Extension CPUs, Peter Maydell, 2020/10/01
- [PULL 06/18] target/arm: Fix sve ldr/str, Peter Maydell, 2020/10/01
- [PULL 05/18] target/arm: Make isar_feature_aa32_fp16_arith() handle M-profile, Peter Maydell, 2020/10/01
- [PULL 07/18] target/arm: Fix SVE splice, Peter Maydell, 2020/10/01
- [PULL 08/18] hw/arm/raspi: Define various blocks base addresses, Peter Maydell, 2020/10/01
- [PULL 09/18] hw/arm/bcm2835: Add more unimplemented peripherals, Peter Maydell, 2020/10/01
- [PULL 10/18] hw/arm/raspi: Remove ignore_memory_transaction_failures on the raspi2, Peter Maydell, 2020/10/01