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[PULL 12/27] hw/arm/smmuv3: Advertise SMMUv3.2 range invalidation
From: |
Peter Maydell |
Subject: |
[PULL 12/27] hw/arm/smmuv3: Advertise SMMUv3.2 range invalidation |
Date: |
Mon, 24 Aug 2020 10:47:56 +0100 |
From: Eric Auger <eric.auger@redhat.com>
Expose the RIL bit so that the guest driver uses range
invalidation. Although RIL is a 3.2 features, We let
the AIDR advertise SMMUv3.1 support as v3.x implementation
is allowed to implement features from v3.(x+1).
Signed-off-by: Eric Auger <eric.auger@redhat.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20200728150815.11446-12-eric.auger@redhat.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
hw/arm/smmuv3-internal.h | 1 +
hw/arm/smmuv3.c | 1 +
2 files changed, 2 insertions(+)
diff --git a/hw/arm/smmuv3-internal.h b/hw/arm/smmuv3-internal.h
index 9ae7d97fafd..fa3c088972e 100644
--- a/hw/arm/smmuv3-internal.h
+++ b/hw/arm/smmuv3-internal.h
@@ -55,6 +55,7 @@ REG32(IDR1, 0x4)
REG32(IDR2, 0x8)
REG32(IDR3, 0xc)
FIELD(IDR3, HAD, 2, 1);
+ FIELD(IDR3, RIL, 10, 1);
REG32(IDR4, 0x10)
REG32(IDR5, 0x14)
FIELD(IDR5, OAS, 0, 3);
diff --git a/hw/arm/smmuv3.c b/hw/arm/smmuv3.c
index b262f0e4a74..0122700e725 100644
--- a/hw/arm/smmuv3.c
+++ b/hw/arm/smmuv3.c
@@ -254,6 +254,7 @@ static void smmuv3_init_regs(SMMUv3State *s)
s->idr[1] = FIELD_DP32(s->idr[1], IDR1, EVENTQS, SMMU_EVENTQS);
s->idr[1] = FIELD_DP32(s->idr[1], IDR1, CMDQS, SMMU_CMDQS);
+ s->idr[3] = FIELD_DP32(s->idr[3], IDR3, RIL, 1);
s->idr[3] = FIELD_DP32(s->idr[3], IDR3, HAD, 1);
/* 4K and 64K granule support */
--
2.20.1
- [PULL 02/27] hw/arm/smmu-common: Factorize some code in smmu_ptw_64(), (continued)
- [PULL 02/27] hw/arm/smmu-common: Factorize some code in smmu_ptw_64(), Peter Maydell, 2020/08/24
- [PULL 04/27] hw/arm/smmu: Introduce smmu_get_iotlb_key(), Peter Maydell, 2020/08/24
- [PULL 03/27] hw/arm/smmu-common: Add IOTLB helpers, Peter Maydell, 2020/08/24
- [PULL 05/27] hw/arm/smmu: Introduce SMMUTLBEntry for PTW and IOTLB value, Peter Maydell, 2020/08/24
- [PULL 06/27] hw/arm/smmu-common: Manage IOTLB block entries, Peter Maydell, 2020/08/24
- [PULL 07/27] hw/arm/smmuv3: Introduce smmuv3_s1_range_inval() helper, Peter Maydell, 2020/08/24
- [PULL 08/27] hw/arm/smmuv3: Get prepared for range invalidation, Peter Maydell, 2020/08/24
- [PULL 09/27] hw/arm/smmuv3: Fix IIDR offset, Peter Maydell, 2020/08/24
- [PULL 10/27] hw/arm/smmuv3: Let AIDR advertise SMMUv3.0 support, Peter Maydell, 2020/08/24
- [PULL 11/27] hw/arm/smmuv3: Support HAD and advertise SMMUv3.1 support, Peter Maydell, 2020/08/24
- [PULL 12/27] hw/arm/smmuv3: Advertise SMMUv3.2 range invalidation,
Peter Maydell <=
- [PULL 13/27] docs/system/arm: Document the Xilinx Versal Virt board, Peter Maydell, 2020/08/24
- [PULL 14/27] target/arm: Pull handling of XScale insns out of disas_coproc_insn(), Peter Maydell, 2020/08/24
- [PULL 15/27] target/arm: Separate decode from handling of coproc insns, Peter Maydell, 2020/08/24
- [PULL 16/27] target/arm: Convert A32 coprocessor insns to decodetree, Peter Maydell, 2020/08/24
- [PULL 17/27] target/arm: Tidy up disas_arm_insn(), Peter Maydell, 2020/08/24
- [PULL 18/27] target/arm: Do M-profile NOCP checks early and via decodetree, Peter Maydell, 2020/08/24
- [PULL 20/27] target/arm: Remove ARCH macro, Peter Maydell, 2020/08/24
- [PULL 19/27] target/arm: Convert T32 coprocessor insns to decodetree, Peter Maydell, 2020/08/24
- [PULL 21/27] target/arm: Delete unused VFP_DREG macros, Peter Maydell, 2020/08/24
- [PULL 22/27] target/arm/translate.c: Delete/amend incorrect comments, Peter Maydell, 2020/08/24