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[PULL 25/29] target/arm: Use tcg_gen_gvec_mov for clear_vec_high
From: |
Peter Maydell |
Subject: |
[PULL 25/29] target/arm: Use tcg_gen_gvec_mov for clear_vec_high |
Date: |
Thu, 21 May 2020 20:16:06 +0100 |
From: Richard Henderson <address@hidden>
The 8-byte store for the end a !is_q operation can be
merged with the other stores. Use a no-op vector move
to trigger the expand_clr portion of tcg_gen_gvec_mov.
Reviewed-by: Alex Bennée <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>
---
target/arm/translate-a64.c | 10 ++--------
1 file changed, 2 insertions(+), 8 deletions(-)
diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c
index 991e451644c..4f6edb28927 100644
--- a/target/arm/translate-a64.c
+++ b/target/arm/translate-a64.c
@@ -496,14 +496,8 @@ static void clear_vec_high(DisasContext *s, bool is_q, int
rd)
unsigned ofs = fp_reg_offset(s, rd, MO_64);
unsigned vsz = vec_full_reg_size(s);
- if (!is_q) {
- TCGv_i64 tcg_zero = tcg_const_i64(0);
- tcg_gen_st_i64(tcg_zero, cpu_env, ofs + 8);
- tcg_temp_free_i64(tcg_zero);
- }
- if (vsz > 16) {
- tcg_gen_gvec_dup_imm(MO_64, ofs + 16, vsz - 16, vsz - 16, 0);
- }
+ /* Nop move, with side effect of clearing the tail. */
+ tcg_gen_gvec_mov(MO_64, ofs, ofs, is_q ? 16 : 8, vsz);
}
void write_fp_dreg(DisasContext *s, int reg, TCGv_i64 v)
--
2.20.1
- [PULL 14/29] hw/arm/fsl-imx25: Wire up watchdog, (continued)
- [PULL 14/29] hw/arm/fsl-imx25: Wire up watchdog, Peter Maydell, 2020/05/21
- [PULL 15/29] hw/arm/fsl-imx31: Wire up watchdog, Peter Maydell, 2020/05/21
- [PULL 16/29] hw/arm/fsl-imx6: Connect watchdog interrupts, Peter Maydell, 2020/05/21
- [PULL 17/29] hw/arm/fsl-imx6ul: Connect watchdog interrupts, Peter Maydell, 2020/05/21
- [PULL 18/29] hw/arm/fsl-imx7: Instantiate various unimplemented devices, Peter Maydell, 2020/05/21
- [PULL 19/29] hw/arm/fsl-imx7: Connect watchdog interrupts, Peter Maydell, 2020/05/21
- [PULL 20/29] hw/arm/integratorcp: Replace hw_error() by qemu_log_mask(), Peter Maydell, 2020/05/21
- [PULL 21/29] hw/arm/pxa2xx: Replace hw_error() by qemu_log_mask(), Peter Maydell, 2020/05/21
- [PULL 22/29] hw/char/xilinx_uartlite: Replace hw_error() by qemu_log_mask(), Peter Maydell, 2020/05/21
- [PULL 23/29] hw/timer/exynos4210_mct: Replace hw_error() by qemu_log_mask(), Peter Maydell, 2020/05/21
- [PULL 25/29] target/arm: Use tcg_gen_gvec_mov for clear_vec_high,
Peter Maydell <=
- [PULL 24/29] ARM: PL061: Introduce N_GPIOS, Peter Maydell, 2020/05/21
- [PULL 26/29] target/arm: Use clear_vec_high more effectively, Peter Maydell, 2020/05/21
- [PULL 27/29] target/arm: Allow user-mode code to write CPSR.E via MSR, Peter Maydell, 2020/05/21
- [PULL 28/29] linux-user/arm: Reset CPSR_E when entering a signal handler, Peter Maydell, 2020/05/21
- [PULL 29/29] linux-user/arm/signal.c: Drop TARGET_CONFIG_CPU_32, Peter Maydell, 2020/05/21