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[PULL 21/29] hw/arm/pxa2xx: Replace hw_error() by qemu_log_mask()
From: |
Peter Maydell |
Subject: |
[PULL 21/29] hw/arm/pxa2xx: Replace hw_error() by qemu_log_mask() |
Date: |
Thu, 21 May 2020 20:16:02 +0100 |
From: Philippe Mathieu-Daudé <address@hidden>
hw_error() calls exit(). This a bit overkill when we can log
the accesses as unimplemented or guest error.
When fuzzing the devices, we don't want the whole process to
exit. Replace some hw_error() calls by qemu_log_mask().
Signed-off-by: Philippe Mathieu-Daudé <address@hidden>
Reviewed-by: Alistair Francis <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>
---
hw/arm/pxa2xx_gpio.c | 7 ++++---
hw/display/pxa2xx_lcd.c | 8 +++++---
hw/dma/pxa2xx_dma.c | 14 +++++++++-----
3 files changed, 18 insertions(+), 11 deletions(-)
diff --git a/hw/arm/pxa2xx_gpio.c b/hw/arm/pxa2xx_gpio.c
index f8df3cc2279..a01db54a518 100644
--- a/hw/arm/pxa2xx_gpio.c
+++ b/hw/arm/pxa2xx_gpio.c
@@ -9,7 +9,6 @@
#include "qemu/osdep.h"
#include "cpu.h"
-#include "hw/hw.h"
#include "hw/irq.h"
#include "hw/qdev-properties.h"
#include "hw/sysbus.h"
@@ -199,7 +198,8 @@ static uint64_t pxa2xx_gpio_read(void *opaque, hwaddr
offset,
return s->status[bank];
default:
- hw_error("%s: Bad offset " REG_FMT "\n", __func__, offset);
+ qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset 0x%" HWADDR_PRIX "\n",
+ __func__, offset);
}
return 0;
@@ -252,7 +252,8 @@ static void pxa2xx_gpio_write(void *opaque, hwaddr offset,
break;
default:
- hw_error("%s: Bad offset " REG_FMT "\n", __func__, offset);
+ qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset 0x%" HWADDR_PRIX "\n",
+ __func__, offset);
}
}
diff --git a/hw/display/pxa2xx_lcd.c b/hw/display/pxa2xx_lcd.c
index 464e93161a2..d5f2e82a4ec 100644
--- a/hw/display/pxa2xx_lcd.c
+++ b/hw/display/pxa2xx_lcd.c
@@ -11,7 +11,7 @@
*/
#include "qemu/osdep.h"
-#include "hw/hw.h"
+#include "qemu/log.h"
#include "hw/irq.h"
#include "migration/vmstate.h"
#include "ui/console.h"
@@ -407,7 +407,8 @@ static uint64_t pxa2xx_lcdc_read(void *opaque, hwaddr
offset,
default:
fail:
- hw_error("%s: Bad offset " REG_FMT "\n", __func__, offset);
+ qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset 0x%" HWADDR_PRIX "\n",
+ __func__, offset);
}
return 0;
@@ -562,7 +563,8 @@ static void pxa2xx_lcdc_write(void *opaque, hwaddr offset,
default:
fail:
- hw_error("%s: Bad offset " REG_FMT "\n", __func__, offset);
+ qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset 0x%" HWADDR_PRIX "\n",
+ __func__, offset);
}
}
diff --git a/hw/dma/pxa2xx_dma.c b/hw/dma/pxa2xx_dma.c
index 88ed4b6ff1f..8a2eeb32bc3 100644
--- a/hw/dma/pxa2xx_dma.c
+++ b/hw/dma/pxa2xx_dma.c
@@ -9,6 +9,7 @@
*/
#include "qemu/osdep.h"
+#include "qemu/log.h"
#include "hw/hw.h"
#include "hw/irq.h"
#include "hw/qdev-properties.h"
@@ -268,7 +269,8 @@ static uint64_t pxa2xx_dma_read(void *opaque, hwaddr offset,
unsigned int channel;
if (size != 4) {
- hw_error("%s: Bad access width\n", __func__);
+ qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad access width %u\n",
+ __func__, size);
return 5;
}
@@ -315,8 +317,8 @@ static uint64_t pxa2xx_dma_read(void *opaque, hwaddr offset,
return s->chan[channel].cmd;
}
}
-
- hw_error("%s: Bad offset 0x" TARGET_FMT_plx "\n", __func__, offset);
+ qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset 0x%" HWADDR_PRIX "\n",
+ __func__, offset);
return 7;
}
@@ -327,7 +329,8 @@ static void pxa2xx_dma_write(void *opaque, hwaddr offset,
unsigned int channel;
if (size != 4) {
- hw_error("%s: Bad access width\n", __func__);
+ qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad access width %u\n",
+ __func__, size);
return;
}
@@ -420,7 +423,8 @@ static void pxa2xx_dma_write(void *opaque, hwaddr offset,
break;
}
fail:
- hw_error("%s: Bad offset " TARGET_FMT_plx "\n", __func__, offset);
+ qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset 0x%" HWADDR_PRIX "\n",
+ __func__, offset);
}
}
--
2.20.1
- [PULL 11/29] target/arm: Remove unused GEN_NEON_INTEGER_OP macro, (continued)
- [PULL 11/29] target/arm: Remove unused GEN_NEON_INTEGER_OP macro, Peter Maydell, 2020/05/21
- [PULL 12/29] hw: Move i.MX watchdog driver to hw/watchdog, Peter Maydell, 2020/05/21
- [PULL 13/29] hw/watchdog: Implement full i.MX watchdog support, Peter Maydell, 2020/05/21
- [PULL 14/29] hw/arm/fsl-imx25: Wire up watchdog, Peter Maydell, 2020/05/21
- [PULL 15/29] hw/arm/fsl-imx31: Wire up watchdog, Peter Maydell, 2020/05/21
- [PULL 16/29] hw/arm/fsl-imx6: Connect watchdog interrupts, Peter Maydell, 2020/05/21
- [PULL 17/29] hw/arm/fsl-imx6ul: Connect watchdog interrupts, Peter Maydell, 2020/05/21
- [PULL 18/29] hw/arm/fsl-imx7: Instantiate various unimplemented devices, Peter Maydell, 2020/05/21
- [PULL 19/29] hw/arm/fsl-imx7: Connect watchdog interrupts, Peter Maydell, 2020/05/21
- [PULL 20/29] hw/arm/integratorcp: Replace hw_error() by qemu_log_mask(), Peter Maydell, 2020/05/21
- [PULL 21/29] hw/arm/pxa2xx: Replace hw_error() by qemu_log_mask(),
Peter Maydell <=
- [PULL 22/29] hw/char/xilinx_uartlite: Replace hw_error() by qemu_log_mask(), Peter Maydell, 2020/05/21
- [PULL 23/29] hw/timer/exynos4210_mct: Replace hw_error() by qemu_log_mask(), Peter Maydell, 2020/05/21
- [PULL 25/29] target/arm: Use tcg_gen_gvec_mov for clear_vec_high, Peter Maydell, 2020/05/21
- [PULL 24/29] ARM: PL061: Introduce N_GPIOS, Peter Maydell, 2020/05/21
- [PULL 26/29] target/arm: Use clear_vec_high more effectively, Peter Maydell, 2020/05/21
- [PULL 27/29] target/arm: Allow user-mode code to write CPSR.E via MSR, Peter Maydell, 2020/05/21
- [PULL 28/29] linux-user/arm: Reset CPSR_E when entering a signal handler, Peter Maydell, 2020/05/21
- [PULL 29/29] linux-user/arm/signal.c: Drop TARGET_CONFIG_CPU_32, Peter Maydell, 2020/05/21