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[PULL 17/39] hw/arm: versal: Add support for the RTC
From: |
Peter Maydell |
Subject: |
[PULL 17/39] hw/arm: versal: Add support for the RTC |
Date: |
Mon, 4 May 2020 13:32:47 +0100 |
From: "Edgar E. Iglesias" <address@hidden>
hw/arm: versal: Add support for the RTC.
Signed-off-by: Edgar E. Iglesias <address@hidden>
Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
Reviewed-by: Alistair Francis <address@hidden>
Reviewed-by: Luc Michel <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>
---
include/hw/arm/xlnx-versal.h | 8 ++++++++
hw/arm/xlnx-versal.c | 21 +++++++++++++++++++++
2 files changed, 29 insertions(+)
diff --git a/include/hw/arm/xlnx-versal.h b/include/hw/arm/xlnx-versal.h
index e11693e29d3..9c9f47ba9da 100644
--- a/include/hw/arm/xlnx-versal.h
+++ b/include/hw/arm/xlnx-versal.h
@@ -19,6 +19,7 @@
#include "hw/char/pl011.h"
#include "hw/dma/xlnx-zdma.h"
#include "hw/net/cadence_gem.h"
+#include "hw/rtc/xlnx-zynqmp-rtc.h"
#define TYPE_XLNX_VERSAL "xlnx-versal"
#define XLNX_VERSAL(obj) OBJECT_CHECK(Versal, (obj), TYPE_XLNX_VERSAL)
@@ -65,6 +66,8 @@ typedef struct Versal {
struct {
SDHCIState sd[XLNX_VERSAL_NR_SDS];
} iou;
+
+ XlnxZynqMPRTC rtc;
} pmc;
struct {
@@ -89,7 +92,10 @@ typedef struct Versal {
#define VERSAL_GEM1_IRQ_0 58
#define VERSAL_GEM1_WAKE_IRQ_0 59
#define VERSAL_ADMA_IRQ_0 60
+#define VERSAL_RTC_APB_ERR_IRQ 121
#define VERSAL_SD0_IRQ_0 126
+#define VERSAL_RTC_ALARM_IRQ 142
+#define VERSAL_RTC_SECONDS_IRQ 143
/* Architecturally reserved IRQs suitable for virtualization. */
#define VERSAL_RSVD_IRQ_FIRST 111
@@ -143,4 +149,6 @@ typedef struct Versal {
#define MM_PMC_SD0_SIZE 0x10000
#define MM_PMC_CRP 0xf1260000U
#define MM_PMC_CRP_SIZE 0x10000
+#define MM_PMC_RTC 0xf12a0000
+#define MM_PMC_RTC_SIZE 0x10000
#endif
diff --git a/hw/arm/xlnx-versal.c b/hw/arm/xlnx-versal.c
index e263bdf77a9..321171bccef 100644
--- a/hw/arm/xlnx-versal.c
+++ b/hw/arm/xlnx-versal.c
@@ -240,6 +240,26 @@ static void versal_create_sds(Versal *s, qemu_irq *pic)
}
}
+static void versal_create_rtc(Versal *s, qemu_irq *pic)
+{
+ SysBusDevice *sbd;
+ MemoryRegion *mr;
+
+ sysbus_init_child_obj(OBJECT(s), "rtc", &s->pmc.rtc, sizeof(s->pmc.rtc),
+ TYPE_XLNX_ZYNQMP_RTC);
+ sbd = SYS_BUS_DEVICE(&s->pmc.rtc);
+ qdev_init_nofail(DEVICE(sbd));
+
+ mr = sysbus_mmio_get_region(sbd, 0);
+ memory_region_add_subregion(&s->mr_ps, MM_PMC_RTC, mr);
+
+ /*
+ * TODO: Connect the ALARM and SECONDS interrupts once our RTC model
+ * supports them.
+ */
+ sysbus_connect_irq(sbd, 1, pic[VERSAL_RTC_APB_ERR_IRQ]);
+}
+
/* This takes the board allocated linear DDR memory and creates aliases
* for each split DDR range/aperture on the Versal address map.
*/
@@ -323,6 +343,7 @@ static void versal_realize(DeviceState *dev, Error **errp)
versal_create_gems(s, pic);
versal_create_admas(s, pic);
versal_create_sds(s, pic);
+ versal_create_rtc(s, pic);
versal_map_ddr(s);
versal_unimp(s);
--
2.20.1
- [PULL 08/39] target/arm: Use uint64_t for midr field in CPU state struct, (continued)
- [PULL 08/39] target/arm: Use uint64_t for midr field in CPU state struct, Peter Maydell, 2020/05/04
- [PULL 07/39] target/arm: Use correct variable for setting 'max' cpu's ID_AA64DFR0, Peter Maydell, 2020/05/04
- [PULL 11/39] hw/arm: versal-virt: Fix typo xlnx-ve -> xlnx-versal, Peter Maydell, 2020/05/04
- [PULL 09/39] hw/arm: versal: Remove inclusion of arm_gicv3_common.h, Peter Maydell, 2020/05/04
- [PULL 10/39] hw/arm: versal: Move misplaced comment, Peter Maydell, 2020/05/04
- [PULL 12/39] hw/arm: versal: Embed the UARTs into the SoC type, Peter Maydell, 2020/05/04
- [PULL 13/39] hw/arm: versal: Embed the GEMs into the SoC type, Peter Maydell, 2020/05/04
- [PULL 14/39] hw/arm: versal: Embed the ADMAs into the SoC type, Peter Maydell, 2020/05/04
- [PULL 15/39] hw/arm: versal: Embed the APUs into the SoC type, Peter Maydell, 2020/05/04
- [PULL 16/39] hw/arm: versal: Add support for SD, Peter Maydell, 2020/05/04
- [PULL 17/39] hw/arm: versal: Add support for the RTC,
Peter Maydell <=
- [PULL 19/39] hw/arm: versal-virt: Add support for the RTC, Peter Maydell, 2020/05/04
- [PULL 18/39] hw/arm: versal-virt: Add support for SD, Peter Maydell, 2020/05/04
- [PULL 20/39] target/arm/translate-vfp.inc.c: Remove duplicate simd_r32 check, Peter Maydell, 2020/05/04
- [PULL 22/39] target/arm: Add stubs for AArch32 Neon decodetree, Peter Maydell, 2020/05/04
- [PULL 21/39] target/arm: Don't allow Thumb Neon insns without FEATURE_NEON, Peter Maydell, 2020/05/04
- [PULL 24/39] target/arm: Convert VCADD (vector) to decodetree, Peter Maydell, 2020/05/04
- [PULL 25/39] target/arm: Convert V[US]DOT (vector) to decodetree, Peter Maydell, 2020/05/04
- [PULL 23/39] target/arm: Convert VCMLA (vector) to decodetree, Peter Maydell, 2020/05/04
- [PULL 26/39] target/arm: Convert VFM[AS]L (vector) to decodetree, Peter Maydell, 2020/05/04
- [PULL 27/39] target/arm: Convert VCMLA (scalar) to decodetree, Peter Maydell, 2020/05/04