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[PULL 15/39] hw/arm: versal: Embed the APUs into the SoC type
From: |
Peter Maydell |
Subject: |
[PULL 15/39] hw/arm: versal: Embed the APUs into the SoC type |
Date: |
Mon, 4 May 2020 13:32:45 +0100 |
From: "Edgar E. Iglesias" <address@hidden>
Embed the APUs into the SoC type.
Suggested-by: Peter Maydell <address@hidden>
Signed-off-by: Edgar E. Iglesias <address@hidden>
Reviewed-by: Alistair Francis <address@hidden>
Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
Reviewed-by: Luc Michel <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>
---
include/hw/arm/xlnx-versal.h | 2 +-
hw/arm/xlnx-versal-virt.c | 4 ++--
hw/arm/xlnx-versal.c | 19 +++++--------------
3 files changed, 8 insertions(+), 17 deletions(-)
diff --git a/include/hw/arm/xlnx-versal.h b/include/hw/arm/xlnx-versal.h
index 94b7826fd49..426b66449de 100644
--- a/include/hw/arm/xlnx-versal.h
+++ b/include/hw/arm/xlnx-versal.h
@@ -36,7 +36,7 @@ typedef struct Versal {
struct {
struct {
MemoryRegion mr;
- ARMCPU *cpu[XLNX_VERSAL_NR_ACPUS];
+ ARMCPU cpu[XLNX_VERSAL_NR_ACPUS];
GICv3State gic;
} apu;
} fpd;
diff --git a/hw/arm/xlnx-versal-virt.c b/hw/arm/xlnx-versal-virt.c
index 8a608074d15..d7be1ad4942 100644
--- a/hw/arm/xlnx-versal-virt.c
+++ b/hw/arm/xlnx-versal-virt.c
@@ -469,9 +469,9 @@ static void versal_virt_init(MachineState *machine)
s->binfo.get_dtb = versal_virt_get_dtb;
s->binfo.modify_dtb = versal_virt_modify_dtb;
if (machine->kernel_filename) {
- arm_load_kernel(s->soc.fpd.apu.cpu[0], machine, &s->binfo);
+ arm_load_kernel(&s->soc.fpd.apu.cpu[0], machine, &s->binfo);
} else {
- AddressSpace *as = arm_boot_address_space(s->soc.fpd.apu.cpu[0],
+ AddressSpace *as = arm_boot_address_space(&s->soc.fpd.apu.cpu[0],
&s->binfo);
/* Some boot-loaders (e.g u-boot) don't like blobs at address 0 (NULL).
* Offset things by 4K. */
diff --git a/hw/arm/xlnx-versal.c b/hw/arm/xlnx-versal.c
index ebd2dc51beb..c8a296e2e05 100644
--- a/hw/arm/xlnx-versal.c
+++ b/hw/arm/xlnx-versal.c
@@ -31,19 +31,11 @@ static void versal_create_apu_cpus(Versal *s)
for (i = 0; i < ARRAY_SIZE(s->fpd.apu.cpu); i++) {
Object *obj;
- char *name;
-
- obj = object_new(XLNX_VERSAL_ACPU_TYPE);
- if (!obj) {
- error_report("Unable to create apu.cpu[%d] of type %s",
- i, XLNX_VERSAL_ACPU_TYPE);
- exit(EXIT_FAILURE);
- }
-
- name = g_strdup_printf("apu-cpu[%d]", i);
- object_property_add_child(OBJECT(s), name, obj, &error_fatal);
- g_free(name);
+ object_initialize_child(OBJECT(s), "apu-cpu[*]",
+ &s->fpd.apu.cpu[i], sizeof(s->fpd.apu.cpu[i]),
+ XLNX_VERSAL_ACPU_TYPE, &error_abort, NULL);
+ obj = OBJECT(&s->fpd.apu.cpu[i]);
object_property_set_int(obj, s->cfg.psci_conduit,
"psci-conduit", &error_abort);
if (i) {
@@ -57,7 +49,6 @@ static void versal_create_apu_cpus(Versal *s)
object_property_set_link(obj, OBJECT(&s->fpd.apu.mr), "memory",
&error_abort);
object_property_set_bool(obj, true, "realized", &error_fatal);
- s->fpd.apu.cpu[i] = ARM_CPU(obj);
}
}
@@ -95,7 +86,7 @@ static void versal_create_apu_gic(Versal *s, qemu_irq *pic)
}
for (i = 0; i < nr_apu_cpus; i++) {
- DeviceState *cpudev = DEVICE(s->fpd.apu.cpu[i]);
+ DeviceState *cpudev = DEVICE(&s->fpd.apu.cpu[i]);
int ppibase = XLNX_VERSAL_NR_IRQS + i * GIC_INTERNAL + GIC_NR_SGIS;
qemu_irq maint_irq;
int ti;
--
2.20.1
- [PULL 03/39] target/arm: Don't use a TLB for ARMMMUIdx_Stage2, (continued)
- [PULL 03/39] target/arm: Don't use a TLB for ARMMMUIdx_Stage2, Peter Maydell, 2020/05/04
- [PULL 04/39] target/arm: Use enum constant in get_phys_addr_lpae() call, Peter Maydell, 2020/05/04
- [PULL 08/39] target/arm: Use uint64_t for midr field in CPU state struct, Peter Maydell, 2020/05/04
- [PULL 07/39] target/arm: Use correct variable for setting 'max' cpu's ID_AA64DFR0, Peter Maydell, 2020/05/04
- [PULL 11/39] hw/arm: versal-virt: Fix typo xlnx-ve -> xlnx-versal, Peter Maydell, 2020/05/04
- [PULL 09/39] hw/arm: versal: Remove inclusion of arm_gicv3_common.h, Peter Maydell, 2020/05/04
- [PULL 10/39] hw/arm: versal: Move misplaced comment, Peter Maydell, 2020/05/04
- [PULL 12/39] hw/arm: versal: Embed the UARTs into the SoC type, Peter Maydell, 2020/05/04
- [PULL 13/39] hw/arm: versal: Embed the GEMs into the SoC type, Peter Maydell, 2020/05/04
- [PULL 14/39] hw/arm: versal: Embed the ADMAs into the SoC type, Peter Maydell, 2020/05/04
- [PULL 15/39] hw/arm: versal: Embed the APUs into the SoC type,
Peter Maydell <=
- [PULL 16/39] hw/arm: versal: Add support for SD, Peter Maydell, 2020/05/04
- [PULL 17/39] hw/arm: versal: Add support for the RTC, Peter Maydell, 2020/05/04
- [PULL 19/39] hw/arm: versal-virt: Add support for the RTC, Peter Maydell, 2020/05/04
- [PULL 18/39] hw/arm: versal-virt: Add support for SD, Peter Maydell, 2020/05/04
- [PULL 20/39] target/arm/translate-vfp.inc.c: Remove duplicate simd_r32 check, Peter Maydell, 2020/05/04
- [PULL 22/39] target/arm: Add stubs for AArch32 Neon decodetree, Peter Maydell, 2020/05/04
- [PULL 21/39] target/arm: Don't allow Thumb Neon insns without FEATURE_NEON, Peter Maydell, 2020/05/04
- [PULL 24/39] target/arm: Convert VCADD (vector) to decodetree, Peter Maydell, 2020/05/04
- [PULL 25/39] target/arm: Convert V[US]DOT (vector) to decodetree, Peter Maydell, 2020/05/04
- [PULL 23/39] target/arm: Convert VCMLA (vector) to decodetree, Peter Maydell, 2020/05/04