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[PULL 08/39] target/arm: Use uint64_t for midr field in CPU state struct
From: |
Peter Maydell |
Subject: |
[PULL 08/39] target/arm: Use uint64_t for midr field in CPU state struct |
Date: |
Mon, 4 May 2020 13:32:38 +0100 |
From: Philippe Mathieu-Daudé <address@hidden>
MIDR_EL1 is a 64-bit system register with the top 32-bit being RES0.
Represent it in QEMU's ARMCPU struct with a uint64_t, not a
uint32_t.
This fixes an error when compiling with -Werror=conversion
because we were manipulating the register value using a
local uint64_t variable:
target/arm/cpu64.c: In function ‘aarch64_max_initfn’:
target/arm/cpu64.c:628:21: error: conversion from ‘uint64_t’ {aka ‘long
unsigned int’} to ‘uint32_t’ {aka ‘unsigned int’} may change value
[-Werror=conversion]
628 | cpu->midr = t;
| ^
and future-proofs us against a possible future architecture
change using some of the top 32 bits.
Suggested-by: Laurent Desnogues <address@hidden>
Suggested-by: Peter Maydell <address@hidden>
Signed-off-by: Philippe Mathieu-Daudé <address@hidden>
Reviewed-by: Laurent Desnogues <address@hidden>
Message-id: address@hidden
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>
---
target/arm/cpu.h | 2 +-
target/arm/cpu.c | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/target/arm/cpu.h b/target/arm/cpu.h
index 9aae324d0f6..8608da6b6fc 100644
--- a/target/arm/cpu.h
+++ b/target/arm/cpu.h
@@ -894,7 +894,7 @@ struct ARMCPU {
uint64_t id_aa64dfr0;
uint64_t id_aa64dfr1;
} isar;
- uint32_t midr;
+ uint64_t midr;
uint32_t revidr;
uint32_t reset_fpsid;
uint32_t ctr;
diff --git a/target/arm/cpu.c b/target/arm/cpu.c
index f588344df83..5d64adfe76e 100644
--- a/target/arm/cpu.c
+++ b/target/arm/cpu.c
@@ -2755,7 +2755,7 @@ static const ARMCPUInfo arm_cpus[] = {
static Property arm_cpu_properties[] = {
DEFINE_PROP_BOOL("start-powered-off", ARMCPU, start_powered_off, false),
DEFINE_PROP_UINT32("psci-conduit", ARMCPU, psci_conduit, 0),
- DEFINE_PROP_UINT32("midr", ARMCPU, midr, 0),
+ DEFINE_PROP_UINT64("midr", ARMCPU, midr, 0),
DEFINE_PROP_UINT64("mp-affinity", ARMCPU,
mp_affinity, ARM64_AFFINITY_INVALID),
DEFINE_PROP_INT32("node-id", ARMCPU, node_id, CPU_UNSET_NUMA_NODE_ID),
--
2.20.1
- [PULL 00/39] target-arm queue, Peter Maydell, 2020/05/04
- [PULL 01/39] target/arm: Make VQDMULL undefined when U=1, Peter Maydell, 2020/05/04
- [PULL 02/39] hw/arm/mps2-tz: Use TYPE_IOTKIT instead of hardcoded string, Peter Maydell, 2020/05/04
- [PULL 05/39] target/arm: Add new 's1_is_el0' argument to get_phys_addr_lpae(), Peter Maydell, 2020/05/04
- [PULL 06/39] target/arm: Implement ARMv8.2-TTS2UXN, Peter Maydell, 2020/05/04
- [PULL 03/39] target/arm: Don't use a TLB for ARMMMUIdx_Stage2, Peter Maydell, 2020/05/04
- [PULL 04/39] target/arm: Use enum constant in get_phys_addr_lpae() call, Peter Maydell, 2020/05/04
- [PULL 08/39] target/arm: Use uint64_t for midr field in CPU state struct,
Peter Maydell <=
- [PULL 07/39] target/arm: Use correct variable for setting 'max' cpu's ID_AA64DFR0, Peter Maydell, 2020/05/04
- [PULL 11/39] hw/arm: versal-virt: Fix typo xlnx-ve -> xlnx-versal, Peter Maydell, 2020/05/04
- [PULL 09/39] hw/arm: versal: Remove inclusion of arm_gicv3_common.h, Peter Maydell, 2020/05/04
- [PULL 10/39] hw/arm: versal: Move misplaced comment, Peter Maydell, 2020/05/04
- [PULL 12/39] hw/arm: versal: Embed the UARTs into the SoC type, Peter Maydell, 2020/05/04
- [PULL 13/39] hw/arm: versal: Embed the GEMs into the SoC type, Peter Maydell, 2020/05/04
- [PULL 14/39] hw/arm: versal: Embed the ADMAs into the SoC type, Peter Maydell, 2020/05/04
- [PULL 15/39] hw/arm: versal: Embed the APUs into the SoC type, Peter Maydell, 2020/05/04
- [PULL 16/39] hw/arm: versal: Add support for SD, Peter Maydell, 2020/05/04
- [PULL 17/39] hw/arm: versal: Add support for the RTC, Peter Maydell, 2020/05/04