Re: [Qemu-devel] [PATCH v2 28/68] target/arm: Diagnose writeback register in list for LDM for v7

[Peter Maydell]

On Mon, 19 Aug 2019 at 22:38, Richard Henderson
<address@hidden> wrote:
>
> Prior to v7, for the A32 encoding, this operation wrote an UNKNOWN
> value back to the base register.  Starting in v7 this is UNPREDICTABLE.
>
> Signed-off-by: Richard Henderson <address@hidden>
> ---
>  target/arm/translate.c | 8 ++++++++
>  1 file changed, 8 insertions(+)
>
> diff --git a/target/arm/translate.c b/target/arm/translate.c
> index 4451adbb97..29e2eae441 100644
> --- a/target/arm/translate.c
> +++ b/target/arm/translate.c
> @@ -9880,6 +9880,14 @@ static bool do_ldm(DisasContext *s, arg_ldst_block *a)
>
>  static bool trans_LDM_a32(DisasContext *s, arg_ldst_block *a)
>  {
> +    /*
> +     * Writeback register in register list is UNPREDICATABLE

Typo: UNPREDICTABLE

> +     * for ArchVersion() >= 7.  Prior to v7, A32 would write
> +     * an UNKNOWN value to the base register.
> +     */
> +    if (ENABLE_ARCH_7 && a->w && (a->list & (1 << a->rn))) {
> +        return false;
> +    }
>      return do_ldm(s, a);
>  }

Otherwise
Reviewed-by: Peter Maydell <address@hidden>

thanks
-- PMM