Re: [Qemu-devel] [PATCH v2 25/68] target/arm: Convert Signed multiply, signed and unsigned divide

[Richard Henderson]

On 8/23/19 10:00 AM, Peter Maydell wrote:
> On Mon, 19 Aug 2019 at 22:38, Richard Henderson
> <address@hidden> wrote:
>>
>> Signed-off-by: Richard Henderson <address@hidden>
>> ---
>>  target/arm/translate.c | 463 ++++++++++++++++++-----------------------
>>  target/arm/a32.decode  |  22 ++
>>  target/arm/t32.decode  |  18 ++
>>  3 files changed, 247 insertions(+), 256 deletions(-)
>>
> 
>> +static bool op_smmla(DisasContext *s, arg_rrrr *a, bool round, bool sub)
>> +{
>> +    TCGv_i32 t1, t2;
>> +
>> +    if (s->thumb
>> +        ? !arm_dc_feature(s, ARM_FEATURE_THUMB_DSP)
>> +        : !ENABLE_ARCH_6) {
>> +        return false;
>> +    }
>> +
>> +    t1 = load_reg(s, a->rn);
>> +    t2 = load_reg(s, a->rm);
>> +    tcg_gen_muls2_i32(t2, t1, t1, t2);
>> +
>> +    if (a->ra != 15) {
>> +        TCGv_i32 t3 = load_reg(s, a->ra);
>> +        if (sub) {
>> +            tcg_gen_sub_i32(t1, t1, t3);
>> +        } else {
>> +            tcg_gen_add_i32(t1, t1, t3);
>> +        }
>> +        tcg_temp_free_i32(t3);
>> +    }
>> +    if (round) {
>> +        tcg_gen_shri_i32(t2, t2, 31);
>> +        tcg_gen_add_i32(t1, t1, t2);
> 
> Can we keep the comment the old decoder had for this case?
> 
> 
>> +    }
>> +    tcg_temp_free_i32(t2);
>> +    store_reg(s, a->rd, t1);
>> +    return true;
>> +}
>> +
> 
> This one:
> 
>> -                if (insn & (1 << 4)) {
>> -                    /*
>> -                     * Adding 0x80000000 to the 64-bit quantity
>> -                     * means that we have carry in to the high
>> -                     * word when the low word has the high bit set.
>> -                     */
>> -                    tcg_gen_shri_i32(tmp2, tmp2, 31);
>> -                    tcg_gen_add_i32(tmp, tmp, tmp2);

Oops, rebase fail.

>> -                }
> 
> Otherwise
> Reviewed-by: Peter Maydell <address@hidden>
> 
> thanks
> -- PMM
>