Re: [RFC] Adding the A64FX's HPC funtions.

[Richard Henderson]

On 6/3/21 1:17 AM, ishii.shuuichir@fujitsu.com wrote:
> Hi, Richard.
>
> Thank you for your comment.
>
> > My first thought is that -cpu max can simply enable the extensions, without
> > extra flags.  The max cpu has all of the features that we can enable, and as I
> > see it this is just one more.
>
> Let me confirm a few things about the above comment.
> Does it mean that I don't need to explicitly enable individual extensions
> such as a64fx-hpc-sec, a64fx-hpc-hwpf, and a64fx-hpc-hwb,
> since all extensions can be enabled by specifying -cpu max?

Well, Peter disagreed with having them enabled by default in -cpu max, so we 
might need at least one extra property.  I see no reason to have three 
properties -- one property a64fx-hpc should be sufficient.  But we might not 
want any command-line properties, see below...

> > The microarchitectural document provided does not list all of the system
> > register reset values for the A64FX, and I would be surprised if there were an
> > architectural id register that specified a non-standard extension like this.
> > Thus I would expect to add ARM_FEATURE_A64FX with which to enable these
> > extensions in helper.c.
>
> As you said,
> some of the published specifications do not describe the reset values of the 
> registers.
> I would like to implement this in QEMU by referring to a real machine with 
> A64FX.

I presume there exists some documentation for this somewhere, though possibly 
only internal to Fujitsu so far.

For comparison, in the Arm Cortex-A76 manual,
  https://developer.arm.com/documentation/100798/0301/
section B2.4 "AArch64 registers by functional group", there is a concise 
listing of all of the system registers and their reset values.

The most important of these for QEMU to create '-cpu a64fx' are the 
ID_AA64{ISAR,MMFR,PFR} and MIDR values.  These values determine all of the 
standard architectural features, and from them we can tell what QEMU may (or 
may not) be missing for proper emulation of the cpu.  For comparison, look at 
aarch64_a72_initfn in target/arm/cpu64.c.

Peter is suggesting that if full support for -cpu a64fx apart from the hpc 
extensions is close, then we shouldn't implementing a property for -cpu max, 
but only implement -cpu a64fx.  (Because how does the OS detect the hpc 
feature, apart from the MIDR value?)


r~