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Re: [PATCH v5 02/54] accel/tcg: Honor atomicity of loads


From: Peter Maydell
Subject: Re: [PATCH v5 02/54] accel/tcg: Honor atomicity of loads
Date: Mon, 15 May 2023 17:43:35 +0100

On Mon, 15 May 2023 at 15:35, Richard Henderson
<richard.henderson@linaro.org> wrote:
>
> Create ldst_atomicity.c.inc.
>
> Not required for user-only code loads, because we've ensured that
> the page is read-only before beginning to translate code.
>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
> v5: Dropped r-b because of MO_ATOM_* reorg
> ---





> +/**
> + * load_atom_2:
> + * @p: host address
> + * @memop: the full memory op
> + *
> + * Load 2 bytes from @p, honoring the atomicity of @memop.
> + */
> +static uint16_t load_atom_2(CPUArchState *env, uintptr_t ra,
> +                            void *pv, MemOp memop)
> +{
> +    uintptr_t pi = (uintptr_t)pv;
> +    int atmax;
> +
> +    if (likely((pi & 1) == 0)) {
> +        return load_atomic2(pv);
> +    }
> +    if (HAVE_al16_fast) {
> +        return load_atom_extract_al16_or_al8(pv, 2);
> +    }
> +
> +    atmax = required_atomicity(env, pi, memop);
> +    switch (atmax) {
> +    case MO_8:
> +        return lduw_he_p(pv);
> +    case MO_16:
> +        /* The only case remaining is MO_ATOM_WITHIN16. */
> +        if (!HAVE_al8_fast && (pi & 3) == 1) {
> +            /* Big or little endian, we want the middle two bytes. */
> +            return load_atomic4(pv - 1) >> 8;
> +        }
> +        if (unlikely((pi & 15) != 7)) {

Why is this the unlikely case ?

> +            return load_atom_extract_al8_or_exit(env, ra, pv, 2);
> +        }
> +        return load_atom_extract_al16_or_exit(env, ra, pv, 2);
> +    default:
> +        g_assert_not_reached();
> +    }
> +}

Either way,
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>

thanks
-- PMM



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