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[PATCH for-8.1 v2 20/26] target/riscv: move riscv_cpu_validate_v() to va
From: |
Daniel Henrique Barboza |
Subject: |
[PATCH for-8.1 v2 20/26] target/riscv: move riscv_cpu_validate_v() to validate_misa_ext() |
Date: |
Tue, 14 Mar 2023 13:49:42 -0300 |
riscv_cpu_validate_v() consists of checking RVV related attributes, such
as vlen and elen, and setting env->vext_spec.
This can be done during riscv_cpu_validate_misa_ext() time, allowing us
to fail earlier if RVV constrains are not met.
Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
---
target/riscv/cpu.c | 18 +++++++++---------
1 file changed, 9 insertions(+), 9 deletions(-)
diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
index fa1954a850..0d8524d0d9 100644
--- a/target/riscv/cpu.c
+++ b/target/riscv/cpu.c
@@ -1027,6 +1027,9 @@ static void riscv_cpu_disable_priv_spec_isa_exts(RISCVCPU
*cpu)
static void riscv_cpu_validate_misa_ext(RISCVCPU *cpu, Error **errp)
{
+ CPURISCVState *env = &cpu->env;
+ Error *local_err = NULL;
+
if (cpu->cfg.ext_i && cpu->cfg.ext_e) {
error_setg(errp,
"I and E extensions are incompatible");
@@ -1073,6 +1076,12 @@ static void riscv_cpu_validate_misa_ext(RISCVCPU *cpu,
Error **errp)
error_setg(errp, "V extension requires D and F extensions");
return;
}
+
+ riscv_cpu_validate_v(env, &cpu->cfg, &local_err);
+ if (local_err != NULL) {
+ error_propagate(errp, local_err);
+ return;
+ }
}
}
@@ -1111,7 +1120,6 @@ static void riscv_cpu_validate_misa_mxl(RISCVCPU *cpu,
Error **errp)
static void riscv_cpu_validate_set_extensions(RISCVCPU *cpu, Error **errp)
{
CPURISCVState *env = &cpu->env;
- Error *local_err = NULL;
uint32_t ext = 0;
if (cpu->cfg.epmp && !cpu->cfg.pmp) {
@@ -1202,14 +1210,6 @@ static void riscv_cpu_validate_set_extensions(RISCVCPU
*cpu, Error **errp)
}
}
- if (cpu->cfg.ext_v) {
- riscv_cpu_validate_v(env, &cpu->cfg, &local_err);
- if (local_err != NULL) {
- error_propagate(errp, local_err);
- return;
- }
- }
-
if (cpu->cfg.ext_zk) {
cpu->cfg.ext_zkn = true;
cpu->cfg.ext_zkr = true;
--
2.39.2
- [PATCH for-8.1 v2 14/26] target/riscv: add RVG, (continued)
- [PATCH for-8.1 v2 14/26] target/riscv: add RVG, Daniel Henrique Barboza, 2023/03/14
- [PATCH for-8.1 v2 15/26] target/riscv: do not allow RVG in write_misa(), Daniel Henrique Barboza, 2023/03/14
- [PATCH for-8.1 v2 16/26] target/riscv/cpu.c: split RVG code from validate_set_extensions(), Daniel Henrique Barboza, 2023/03/14
- [PATCH for-8.1 v2 17/26] target/riscv: write env->misa_ext* in register_generic_cpu_props(), Daniel Henrique Barboza, 2023/03/14
- [PATCH for-8.1 v2 18/26] target/risc/cpu.c: add riscv_cpu_validate_misa_ext(), Daniel Henrique Barboza, 2023/03/14
- [PATCH for-8.1 v2 19/26] target/riscv/cpu:c add misa_ext V-> D & F dependency, Daniel Henrique Barboza, 2023/03/14
- [PATCH for-8.1 v2 20/26] target/riscv: move riscv_cpu_validate_v() to validate_misa_ext(),
Daniel Henrique Barboza <=
- [PATCH for-8.1 v2 21/26] target/riscv: validate_misa_ext() now validates a misa_ext val, Daniel Henrique Barboza, 2023/03/14
- [PATCH for-8.1 v2 25/26] target/riscv: rework write_misa(), Daniel Henrique Barboza, 2023/03/14
[PATCH for-8.1 v2 23/26] target/riscv: split riscv_cpu_validate_set_extensions(), Daniel Henrique Barboza, 2023/03/14
[PATCH for-8.1 v2 22/26] target/riscv: error out on priv failure for RVH, Daniel Henrique Barboza, 2023/03/14
[PATCH for-8.1 v2 24/26] target/riscv: use misa_ext val in riscv_cpu_validate_extensions(), Daniel Henrique Barboza, 2023/03/14