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Re: [PATCH v3 2/9] target/riscv: Don't overwrite the reset vector
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From: |
Bin Meng |
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Subject: |
Re: [PATCH v3 2/9] target/riscv: Don't overwrite the reset vector |
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Date: |
Thu, 21 May 2020 09:45:20 +0800 |
On Wed, May 20, 2020 at 5:39 AM Alistair Francis
<address@hidden> wrote:
>
> The reset vector is set in the init function don't set it again in
> realize.
>
> Signed-off-by: Alistair Francis <address@hidden>
> ---
> target/riscv/cpu.c | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
Reviewed-by: Bin Meng <address@hidden>
[PATCH v3 4/9] riscv: Initial commit of OpenTitan machine, Alistair Francis, 2020/05/19
[PATCH v3 5/9] hw/char: Initial commit of Ibex UART, Alistair Francis, 2020/05/19
[PATCH v3 6/9] hw/intc: Initial commit of lowRISC Ibex PLIC, Alistair Francis, 2020/05/19
[PATCH v3 7/9] riscv/opentitan: Connect the PLIC device, Alistair Francis, 2020/05/19