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Re: [PATCH v2 13/14] target/ppc: 405: Program exception cleanup
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From: |
Fabiano Rosas |
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Subject: |
Re: [PATCH v2 13/14] target/ppc: 405: Program exception cleanup |
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Date: |
Wed, 19 Jan 2022 09:54:41 -0300 |
David Gibson <david@gibson.dropbear.id.au> writes:
> On Tue, Jan 18, 2022 at 03:44:47PM -0300, Fabiano Rosas wrote:
>> The 405 Program Interrupt does not set SRR1 with any diagnostic bits,
>> just a clean copy of the MSR.
>>
>> We're using the BookE Exception Syndrome Register which is different
>> from the 405.
>
> Hrm. We really do want to set the 40x ESR bits here, though.
Well I wrote the code and nothing changed so I dropped it. Not sure if
we are even raising these properly in the translation code. I'll take
another look.
- Re: [PATCH v2 11/14] target/ppc: 405: Data Storage exception cleanup, (continued)
[PATCH v2 09/14] target/ppc: 405: Alignment exception cleanup, Fabiano Rosas, 2022/01/18
[PATCH v2 12/14] target/ppc: 405: Instruction storage interrupt cleanup, Fabiano Rosas, 2022/01/18
[PATCH v2 13/14] target/ppc: 405: Program exception cleanup, Fabiano Rosas, 2022/01/18
Re: [PATCH v2 13/14] target/ppc: 405: Program exception cleanup, Cédric Le Goater, 2022/01/25
Re: [PATCH v2 00/14] target/ppc: powerpc_excp improvements [40x] (3/n), Cédric Le Goater, 2022/01/20