[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[PATCH 13/37] target/ppc: Implement Vector Compare Quadword
From: |
matheus . ferst |
Subject: |
[PATCH 13/37] target/ppc: Implement Vector Compare Quadword |
Date: |
Fri, 7 Jan 2022 15:56:29 -0300 |
From: Matheus Ferst <matheus.ferst@eldorado.org.br>
Implement the following PowerISA v3.1 instructions:
vcmpsq: Vector Compare Signed Quadword
vcmpuq: Vector Compare Unsigned Quadword
Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
---
target/ppc/insn32.decode | 6 ++++
target/ppc/translate/vmx-impl.c.inc | 45 +++++++++++++++++++++++++++++
2 files changed, 51 insertions(+)
diff --git a/target/ppc/insn32.decode b/target/ppc/insn32.decode
index 45649f7d1d..605e66872e 100644
--- a/target/ppc/insn32.decode
+++ b/target/ppc/insn32.decode
@@ -60,6 +60,9 @@
&VX vrt vra vrb
@VX ...... vrt:5 vra:5 vrb:5 .......... . &VX
+&VX_bf bf vra vrb
+@VX_bf ...... bf:3 .. vra:5 vrb:5 ........... &VX_bf
+
&VX_uim4 vrt uim vrb
@VX_uim4 ...... vrt:5 . uim:4 vrb:5 ........... &VX_uim4
@@ -404,6 +407,9 @@ VCMPNEZB 000100 ..... ..... ..... . 0100000111 @VC
VCMPNEZH 000100 ..... ..... ..... . 0101000111 @VC
VCMPNEZW 000100 ..... ..... ..... . 0110000111 @VC
+VCMPSQ 000100 ... -- ..... ..... 00101000001 @VX_bf
+VCMPUQ 000100 ... -- ..... ..... 00100000001 @VX_bf
+
## Vector Bit Manipulation Instruction
VCFUGED 000100 ..... ..... ..... 10101001101 @VX
diff --git a/target/ppc/translate/vmx-impl.c.inc
b/target/ppc/translate/vmx-impl.c.inc
index 302ef4370a..2c13fbeb39 100644
--- a/target/ppc/translate/vmx-impl.c.inc
+++ b/target/ppc/translate/vmx-impl.c.inc
@@ -1204,6 +1204,51 @@ static bool do_vcmpgtq(DisasContext *ctx, arg_VC *a,
bool sign)
TRANS(VCMPGTSQ, do_vcmpgtq, true)
TRANS(VCMPGTUQ, do_vcmpgtq, false)
+static bool do_vcmpq(DisasContext *ctx, arg_VX_bf *a, bool sign)
+{
+ TCGv_i64 vra, vrb;
+ TCGLabel *gt, *lt, *done;
+
+ REQUIRE_INSNS_FLAGS2(ctx, ISA310);
+ REQUIRE_VECTOR(ctx);
+
+ vra = tcg_temp_local_new_i64();
+ vrb = tcg_temp_local_new_i64();
+ gt = gen_new_label();
+ lt = gen_new_label();
+ done = gen_new_label();
+
+ get_avr64(vra, a->vra, true);
+ get_avr64(vrb, a->vrb, true);
+ tcg_gen_brcond_i64((sign ? TCG_COND_GT : TCG_COND_GTU), vra, vrb, gt);
+ tcg_gen_brcond_i64((sign ? TCG_COND_LT : TCG_COND_LTU), vra, vrb, lt);
+
+ get_avr64(vra, a->vra, false);
+ get_avr64(vrb, a->vrb, false);
+ tcg_gen_brcond_i64(TCG_COND_GTU, vra, vrb, gt);
+ tcg_gen_brcond_i64(TCG_COND_LTU, vra, vrb, lt);
+
+ tcg_gen_movi_i32(cpu_crf[a->bf], CRF_EQ);
+ tcg_gen_br(done);
+
+ gen_set_label(gt);
+ tcg_gen_movi_i32(cpu_crf[a->bf], CRF_GT);
+ tcg_gen_br(done);
+
+ gen_set_label(lt);
+ tcg_gen_movi_i32(cpu_crf[a->bf], CRF_LT);
+ tcg_gen_br(done);
+
+ gen_set_label(done);
+ tcg_temp_free_i64(vra);
+ tcg_temp_free_i64(vrb);
+
+ return true;
+}
+
+TRANS(VCMPSQ, do_vcmpq, true)
+TRANS(VCMPUQ, do_vcmpq, false)
+
GEN_VXRFORM(vcmpeqfp, 3, 3)
GEN_VXRFORM(vcmpgefp, 3, 7)
GEN_VXRFORM(vcmpgtfp, 3, 11)
--
2.25.1
- [PATCH 02/37] target/ppc: moved vector even and odd multiplication to decodetree, (continued)
- [PATCH 02/37] target/ppc: moved vector even and odd multiplication to decodetree, matheus . ferst, 2022/01/07
- [PATCH 04/37] target/ppc: vmulh* instructions use gvec, matheus . ferst, 2022/01/07
- [PATCH 05/37] target/ppc: Implement vmsumcud instruction, matheus . ferst, 2022/01/07
- [PATCH 06/37] target/ppc: Implement vmsumudm instruction, matheus . ferst, 2022/01/07
- [PATCH 07/37] target/ppc: Move vexts[bhw]2[wd] to decodetree, matheus . ferst, 2022/01/07
- [PATCH 08/37] target/ppc: Implement vextsd2q, matheus . ferst, 2022/01/07
- [PATCH 09/37] target/ppc: Move Vector Compare Equal/Not Equal/Greater Than to decodetree, matheus . ferst, 2022/01/07
- [PATCH 10/37] target/ppc: Move Vector Compare Not Equal or Zero to decodetree, matheus . ferst, 2022/01/07
- [PATCH 12/37] target/ppc: Implement Vector Compare Greater Than Quadword, matheus . ferst, 2022/01/07
- [PATCH 11/37] target/ppc: Implement Vector Compare Equal Quadword, matheus . ferst, 2022/01/07
- [PATCH 13/37] target/ppc: Implement Vector Compare Quadword,
matheus . ferst <=
- [PATCH 14/37] target/ppc: implement vstri[bh][lr], matheus . ferst, 2022/01/07
- [PATCH 15/37] target/ppc: implement vclrlb, matheus . ferst, 2022/01/07
- [PATCH 16/37] target/ppc: implement vclrrb, matheus . ferst, 2022/01/07
- [PATCH 17/37] target/ppc: implement vcntmb[bhwd], matheus . ferst, 2022/01/07
- [PATCH 19/37] target/ppc: Move vsel and vperm/vpermr to decodetree, matheus . ferst, 2022/01/07
- [PATCH 18/37] target/ppc: implement vgnb, matheus . ferst, 2022/01/07
- [PATCH 20/37] target/ppc: Move xxsel to decodetree, matheus . ferst, 2022/01/07
- [PATCH 21/37] target/ppc: move xxperm/xxpermr to decodetree, matheus . ferst, 2022/01/07
- [PATCH 22/37] target/ppc: Move xxpermdi to decodetree, matheus . ferst, 2022/01/07
- [PATCH 25/37] target/ppc: Implement xxeval, matheus . ferst, 2022/01/07