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[PULL 17/48] target/ppc: Split out decode_legacy
From: |
David Gibson |
Subject: |
[PULL 17/48] target/ppc: Split out decode_legacy |
Date: |
Wed, 19 May 2021 22:51:17 +1000 |
From: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Luis Pires <luis.pires@eldorado.org.br>
Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
Message-Id: <20210512185441.3619828-3-matheus.ferst@eldorado.org.br>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
---
target/ppc/translate.c | 115 +++++++++++++++++++++++------------------
1 file changed, 64 insertions(+), 51 deletions(-)
diff --git a/target/ppc/translate.c b/target/ppc/translate.c
index abdef7e291..d6a8a04380 100644
--- a/target/ppc/translate.c
+++ b/target/ppc/translate.c
@@ -9062,6 +9062,62 @@ void ppc_cpu_dump_statistics(CPUState *cs, int flags)
#endif
}
+static bool decode_legacy(PowerPCCPU *cpu, DisasContext *ctx, uint32_t insn)
+{
+ opc_handler_t **table, *handler;
+ uint32_t inval;
+
+ ctx->opcode = insn;
+
+ LOG_DISAS("translate opcode %08x (%02x %02x %02x %02x) (%s)\n",
+ insn, opc1(insn), opc2(insn), opc3(insn), opc4(insn),
+ ctx->le_mode ? "little" : "big");
+
+ table = cpu->opcodes;
+ handler = table[opc1(insn)];
+ if (is_indirect_opcode(handler)) {
+ table = ind_table(handler);
+ handler = table[opc2(insn)];
+ if (is_indirect_opcode(handler)) {
+ table = ind_table(handler);
+ handler = table[opc3(insn)];
+ if (is_indirect_opcode(handler)) {
+ table = ind_table(handler);
+ handler = table[opc4(insn)];
+ }
+ }
+ }
+
+ /* Is opcode *REALLY* valid ? */
+ if (unlikely(handler->handler == &gen_invalid)) {
+ qemu_log_mask(LOG_GUEST_ERROR, "invalid/unsupported opcode: "
+ "%02x - %02x - %02x - %02x (%08x) "
+ TARGET_FMT_lx "\n",
+ opc1(insn), opc2(insn), opc3(insn), opc4(insn),
+ insn, ctx->cia);
+ return false;
+ }
+
+ if (unlikely(handler->type & (PPC_SPE | PPC_SPE_SINGLE | PPC_SPE_DOUBLE)
+ && Rc(insn))) {
+ inval = handler->inval2;
+ } else {
+ inval = handler->inval1;
+ }
+
+ if (unlikely((insn & inval) != 0)) {
+ qemu_log_mask(LOG_GUEST_ERROR, "invalid bits: %08x for opcode: "
+ "%02x - %02x - %02x - %02x (%08x) "
+ TARGET_FMT_lx "\n", insn & inval,
+ opc1(insn), opc2(insn), opc3(insn), opc4(insn),
+ insn, ctx->cia);
+ return false;
+ }
+
+ handler->handler(ctx);
+ return true;
+}
+
static void ppc_tr_init_disas_context(DisasContextBase *dcbase, CPUState *cs)
{
DisasContext *ctx = container_of(dcbase, DisasContext, base);
@@ -9143,66 +9199,23 @@ static void ppc_tr_translate_insn(DisasContextBase
*dcbase, CPUState *cs)
DisasContext *ctx = container_of(dcbase, DisasContext, base);
PowerPCCPU *cpu = POWERPC_CPU(cs);
CPUPPCState *env = cs->env_ptr;
- opc_handler_t **table, *handler;
+ uint32_t insn;
+ bool ok;
LOG_DISAS("----------------\n");
LOG_DISAS("nip=" TARGET_FMT_lx " super=%d ir=%d\n",
ctx->base.pc_next, ctx->mem_idx, (int)msr_ir);
ctx->cia = ctx->base.pc_next;
- ctx->opcode = translator_ldl_swap(env, ctx->base.pc_next,
- need_byteswap(ctx));
-
- LOG_DISAS("translate opcode %08x (%02x %02x %02x %02x) (%s)\n",
- ctx->opcode, opc1(ctx->opcode), opc2(ctx->opcode),
- opc3(ctx->opcode), opc4(ctx->opcode),
- ctx->le_mode ? "little" : "big");
+ insn = translator_ldl_swap(env, ctx->base.pc_next, need_byteswap(ctx));
ctx->base.pc_next += 4;
- table = cpu->opcodes;
- handler = table[opc1(ctx->opcode)];
- if (is_indirect_opcode(handler)) {
- table = ind_table(handler);
- handler = table[opc2(ctx->opcode)];
- if (is_indirect_opcode(handler)) {
- table = ind_table(handler);
- handler = table[opc3(ctx->opcode)];
- if (is_indirect_opcode(handler)) {
- table = ind_table(handler);
- handler = table[opc4(ctx->opcode)];
- }
- }
- }
- /* Is opcode *REALLY* valid ? */
- if (unlikely(handler->handler == &gen_invalid)) {
- qemu_log_mask(LOG_GUEST_ERROR, "invalid/unsupported opcode: "
- "%02x - %02x - %02x - %02x (%08x) "
- TARGET_FMT_lx " %d\n",
- opc1(ctx->opcode), opc2(ctx->opcode),
- opc3(ctx->opcode), opc4(ctx->opcode),
- ctx->opcode, ctx->cia, (int)msr_ir);
- } else {
- uint32_t inval;
- if (unlikely(handler->type & (PPC_SPE | PPC_SPE_SINGLE |
PPC_SPE_DOUBLE)
- && Rc(ctx->opcode))) {
- inval = handler->inval2;
- } else {
- inval = handler->inval1;
- }
-
- if (unlikely((ctx->opcode & inval) != 0)) {
- qemu_log_mask(LOG_GUEST_ERROR, "invalid bits: %08x for opcode: "
- "%02x - %02x - %02x - %02x (%08x) "
- TARGET_FMT_lx "\n", ctx->opcode & inval,
- opc1(ctx->opcode), opc2(ctx->opcode),
- opc3(ctx->opcode), opc4(ctx->opcode),
- ctx->opcode, ctx->cia);
- gen_inval_exception(ctx, POWERPC_EXCP_INVAL_INVAL);
- ctx->base.is_jmp = DISAS_NORETURN;
- return;
- }
+ ok = decode_legacy(cpu, ctx, insn);
+ if (!ok) {
+ gen_invalid(ctx);
+ ctx->base.is_jmp = DISAS_NORETURN;
}
- (*(handler->handler))(ctx);
+
#if defined(DO_PPC_STATISTICS)
handler->count++;
#endif
--
2.31.1
- [PULL 03/48] target/ppc: Fold gen_*_xer into their callers, (continued)
- [PULL 03/48] target/ppc: Fold gen_*_xer into their callers, David Gibson, 2021/05/19
- [PULL 02/48] hw/ppc/spapr.c: Make sure the host supports the selected MMU mode, David Gibson, 2021/05/19
- [PULL 01/48] hw/ppc/spapr.c: Extract MMU mode error reporting into a function, David Gibson, 2021/05/19
- [PULL 04/48] target/ppc: renamed SPR registration functions, David Gibson, 2021/05/19
- [PULL 08/48] target/ppc: moved ppc_store_lpcr to misc_helper.c, David Gibson, 2021/05/19
- [PULL 09/48] hw/ppc: moved has_spr to cpu.h, David Gibson, 2021/05/19
- [PULL 10/48] target/ppc: turned SPR R/W callbacks not static, David Gibson, 2021/05/19
- [PULL 11/48] target/ppc: isolated cpu init from translation logic, David Gibson, 2021/05/19
- [PULL 07/48] target/ppc: moved function out of mmu-hash64, David Gibson, 2021/05/19
- [PULL 16/48] target/ppc: Add cia field to DisasContext, David Gibson, 2021/05/19
- [PULL 17/48] target/ppc: Split out decode_legacy,
David Gibson <=
- [PULL 14/48] target/ppc: moved ppc_store_sdr1 to cpu.c, David Gibson, 2021/05/19
- [PULL 20/48] target/ppc: Remove special case for POWERPC_EXCP_TRAP, David Gibson, 2021/05/19
- [PULL 18/48] target/ppc: Move DISAS_NORETURN setting into gen_exception*, David Gibson, 2021/05/19
- [PULL 22/48] target/ppc: Introduce DISAS_{EXIT,CHAIN}{,_UPDATE}, David Gibson, 2021/05/19
- [PULL 06/48] hw/ppc: moved hcalls that depend on softmmu, David Gibson, 2021/05/19
- [PULL 12/48] target/ppc: created ppc_{store, get}_vscr for generic vscr usage, David Gibson, 2021/05/19
- [PULL 05/48] target/ppc: move SPR R/W callbacks to translate.c, David Gibson, 2021/05/19
- [PULL 28/48] target/ppc: Remove DisasContext.exception, David Gibson, 2021/05/19
- [PULL 13/48] target/ppc: updated vscr manipulation in machine.c, David Gibson, 2021/05/19
- [PULL 15/48] target/ppc: moved ppc_cpu_dump_state to cpu_init.c, David Gibson, 2021/05/19